參數(shù)資料
型號(hào)： μPD30102
廠商： NEC Corp.
英文描述： 64-/32-BIT Microprocessor(64/32位微處理器)
中文描述： 64-/32-BIT微處理器（64/32位微處理器）
文件頁數(shù)： 71/112頁
文件大?。?/td> 639K
代理商： ΜPD30102
μ
PD30102
71
Preliminary Data Sheet
Table 22-1. CPU Instruction Set: ISA (2/2)
Instruction
Description
Format
Multiplication/division instruction
op
rs
rt
rd
sa
funct
MULT
Multiply
MULT
rs, rt
MULTU
Multiply Unsigned
MULTU
rs, rt
DIV
Divide
DIV
rs, rt
DIVU
Divide Unsigned
DIVU
rs, rt
MFHI
Move From HI
MFHI
rd
MFLO
Move From LO
MFLO
rd
MTHI
Move To HI
MTHI
rs
MTLO
Move To LO
MTLO
rs
Jump instruction (1)
op
target
J
Jump
J
target
JAL
Jump And Link
JAL
target
Jump instruction (2)
op
rs
rt
rd
sa
funct
JR
Jump Register
JR
rs
JALR
Jump And Link Register
JALR
rs, rd
Branch instruction (1)
op
rs
rt
offset
BEQ
Branch On Equal
BEQ
rs, rt, offset
BNE
Branch On Not Equal
BNE
rs, rt, offset
BLEZ
Branch On Less Than Or Equal To Zero
BLEZ
rs, offset
BGTZ
Branch On Greater Than Zero
BGTZ
rs, offset
Branch instruction (2)
REGIMM
rs
sub
offset
BLTZ
Branch On Less Than Zero
BLTZ
rs, offset
BGEZ
Branch On Greater Than Or Equal to Zero
BGEZ
rs, offset
BLTZAL
Branch On Less Than Zero And Link
BLTZAL
rs, offset
BGEZAL
Branch On Greater Than Or Equal To Zero And Link
BGEZAL
rs, offset
Special instruction
SPECIAL
rs
rt
rd
sa
funct
SYNC
Synchronize
SYNC
SYSCALL
System Call
SYSCALL
BREAK
Breakpoint
BREAK
Coprocessor instruction (1)
op
rs
rt
rd
sa
funct
LWCz
Load Word To Coprocessor z
LWCz
rt, offset (base)
SWCz
Store Word From Coprocessor z
SWCz
rt, offset (base)
Coprocessor instruction (2)
op
rs
rt
rd
sa
funct
MTCz
Move To Coprocessor z
MTCz
rt, rd
MFCz
Move From Coprocessor z
MFCz
rt, rd
CTCz
Move Control To Coprocessor z
CTCz
rt, rd
CFCz
Move Control From Coprocessor z
CFCz
rt, rd
Coprocessor instruction (3)
COPz
CO
cofun
COPz
Coprocessor z Operation
COPz
cofun
Coprocessor instruction (4)
COPz
BC
br
offset
BCzT
Branch On Coprocessor z True
BCzT
offset
BCzF
Branch On Coprocessor z False
BCzF
offset
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