參數(shù)資料
型號: μPD30102
廠商: NEC Corp.
英文描述: 64-/32-BIT Microprocessor(64/32位微處理器)
中文描述: 64-/32-BIT微處理器(64/32位微處理器)
文件頁數(shù): 50/112頁
文件大?。?/td> 639K
代理商: ΜPD30102
μ
PD30102
50
Preliminary Data Sheet
5. BCU (BUS CONTROL UNIT)
5.1 General
The BCU transfers data with the V
R
4100 CPU core via SysAD bus (internal) inside the V
R
4102. It also controls an
external LCD controller, DRAM, ROM (flash memory or mask ROM), and PCMCIA controller via system bus, and
transfers data with these devices via ADD bus and DATA bus.
For the timing chart between the V
R
4102 and each external device that is controlled by BCU, see
23. ELECTRICAL
SPECIFICATIONS
.
Table 5-1. BCU Registers
Physical Address
Symbol
Function
0x0B00 0000
BCUCNTREG1
BCU control register 1
0x0B00 0002
BCUCNTREG2
BCU control register 2
0x0B00 000A
BCUSPEEDREG
BCU access cycle change register
0x0B00 000C
BCUERRSTREG
BCU bus error status register
0x0B00 000E
BCURFCNTREG
BCU refresh control register
0x0B00 0010
REVIDREG
Peripheral unit revision ID register
0x0B00 0012
BCURFCOUNTREG
BCU refresh cycle count register
0x0B00 0014
CLKSPEEDREG
Clock specify register
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