
The 64-bit V
R
4122 (μPD30122) microprocessor, a member of NEC’s V
R
Series microprocessors,
is designed especially for high-performance handheld portable computing devices and PCI-based
systems such as network terminals, auto PCs, webphotos, and other embedded systems. It uses the
MIPS
RISC architecture developed by MIPS Technologies and offers excellent power consumption
and performance in a highly integrated, low-cost system on a chip.
The microprocessor uses the ultra-low-power-consuming V
R
4120 CPU core based on advanced
0.18-micron technology. The V
R
4120 CPU has an optimized five-stage pipeline, 32-KB instruction
cache, 16-KB data cache, multiply-and-accumulate (MAC) unit, and memory management unit (MMU)
that enable high performance in a compact, low-cost chip. The integrated peripherals include a power
management unit (PMU), direct memory address (DMA) unit, interrupt control unit, timers, real-time
clock, 16550-compatible serial interface, IrDA
interface, and PCI bus controller.
The V
R
4122 microprocessor is compliant with the MIPS I, II, III instruction set architectures (ISAs) and
MIPS16 application-specific extension (ASE). For MIPS16 ASE compliance, the V
R
4122 incorporates
16-bit instructions with conventional 32-bit instructions to allow compact code size, lower memory, and
lower system cost.
The V
R
4122 microprocessor provides an easy choice for V
R
4121 customers in terms of upgrade,
since the V
R
4122 and V
R
4121 are software compatible. The V
R
4122 microprocessor’s high speed,
compact size, and low power consumption make it ideal for use in battery-driven, portable handheld
systems.
V
R
4 1 2 2 6 4 - B I T M I P S R I S C M I C R O P R O C E S S O R
B L O C K D I A G R A M
32-bit
PC
LCD Panel
640 x 480
18.432 MHz
32.768 kHz
LED/
General-
Purpose
I/Os
In-Circuit
Emulator
N-Wire
/JTAG
Clock
Serial
Interface
Serial
Interface
Unit
FIR/SIR
RS-232-C
Driver
IR
Driver
Host
Bridge
Direct Memory
Address Unit
Memory
Bus Interface
Phase
Locked Loop
Clock
V
R
4120 Core
150/180 MHz
Instruction
Cache
32 KB
Data
Cache
16 KB
DSU
Power
Management
Unit
Interrupt
Control Unit
Real-Time
Clock
ISA
Bridge
CMU
LCD
Controller
Companion Chip
PIU
A/D
D/A
PC Card
Buffer
KIU
PCI Bus Interface
SDRAM
ROM/
Flash Memory
7
12
74
51
P R E LI M I N A R Y