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參數(shù)資料
| 型號： | XRT72L73 |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 54/105頁 |
| 文件大?。?/td> | 1307K |
| 代理商： | XRT72L73 |
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XRT72L73
THREE CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER IC
REV. P1.0.1
á
PRELIMINARY
54
T
ABLE
7:
T
EST
C
ELL
C
ONTROL
AND
S
TATUS
R
EGISTER
R
EGISTER
6 T
EST
C
ELL
C
ONTROL
AND
S
TATUS
R
EGISTER
H
EX
A
DDRESS
: 0
X
06
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
CLEAR CHANNEL
ENABLE
R/W
0
0: Configures the XRT72L73 to operate in the “ATM UNI” Mode.
1: Configures the XRT72L73 to operate in the “Clear Channel Mode”
6
Tx Overheard Extracted
Data Input
R/W
0
0: Transmit Payload Data Interface does not accept overhead bits via the
“TxSerData” input pin
1: Transmit Payload Data Input Interface block accepts overhead bits via the
“TxSerData” input pin.
N
OTE
:
This register is only active if the XRT72L73 has been configured to
operate in the “ATM UNI” Mode.
5
Unused
RO
0
4
TEST CELL ENABLE/
PRBS ENABLE
R/W
0
If the XRT72L73 has been configured to operate in the ATM UNI Mode:
0: Disables the Test Cell Generator and Receiver
1: Enables the Test Cell Generator and Receiver. The test cell Generator will
begin generating an inserting “Test Cell” into the “outbound” DS3 data
stream. The Test Cell Receiver will begin to “l(fā)ook for” Test Cells, and acquire
a PRBS pattern with the “payload bytes” of these test cells.
If the XRT72L73 has beenconfigured to operate in the “Clear Channel
Framer” Mode:
0: Disables the PRBS Generator and Receiver
1: Enables the PRBS Generator and Receiver. The PRBS Generator will
begin to insert a “PRBS” pattern into the “outbound” DS3 data strream. The
PRBS Receiver will begin to “l(fā)ook” for this PRBS pattern and acquire “PRBS
Lock”
3
Reserved
R/W
0
This bit-field is unused
2
ONE-SHOT TEST
R/W
0
O: Continous Mode - Test cells are generated as long as the “TEST CELL
ENABLE” bit is high
1: Burst Mode - 0 to 1 transition in the “TEST CELL ENABLE” bit results in
the generation of 1024 test cells.
N
OTE
:
This register is only active if the XRT72L73 has been configured to
operate in the “ATM UNI” Mode.
1
ONE SHOT DONE
RO
0
0: Test Cell Generator is currently generating its burst of 1024 Test Cells.
1: Test Cell Generator has completed generating its “l(fā)atest” burst of 1024
Test Cells. This bit-field is reset when a new cycle is begun by a 0 to 1 tran-
sition within the “TEST CELL ENABLE” bit-field.
N
OTE
:
This bit-field is only active if both of the following conditions are true.
1. The XRT72L73 has been configured to operate in the
“ATM UNI Mode
2. The Test Cell Generator/Receiver has been configured
to operate in the “Burst” Mode.
0
PRBS LOCK
RO
0
0: The Test Cell Receiver (for “ATM UNI” Applications” or the PRBS Receiver
(for “Clear-Channel Framer” applications) has not yet acquired “Pattern Lock”
with the “PRBS” data bening generated by the Test Cell Generator/PRBS
Generator.
1: The Test Cell Receiver/PRBS Receiver has been able to acquire Pattern
Lock with the PRBS data being generated by the Test Cell Generator.
N
OTE
:
Once the Test Cell Receiver/PRBS Receiver has acquired PRBS
Lock, then it will begin to record “Pattern Bit Error” events within the Test Cell
Error Count (or PRBS Error Count) Registers.
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| XRT72L74 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
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相關(guān)代理商/技術(shù)參數(shù) |
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| XRT72L73IB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
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| XRT7300ES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT7300IV | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI . . RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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