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XRT72L73
THREE CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER IC
PRELIMINARY
REV. P1.0.1
101
T
ABLE
117:
PMON CP-B
IT
E
RROR
E
VENT
C
OUNT
R
EGISTER
- MSB
R
EGISTER
116 PMON CP-B
IT
E
RROR
E
VENT
C
OUNT
R
EGISTER
- MSB H
EX
A
DDRESS
: 0
X
74
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
CP-bit Error Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON CP-Bit Error Count
Register - LSB” contains the 16 bit value for the total number of CP Bit errors
that have been detected since the last read of this register. This register
contains the “High” byte value of this 16-bit expression.
T
ABLE
118:
PMON CP-B
IT
E
RROR
E
VENT
C
OUNT
R
EGISTER
- LSB
R
EGISTER
117 PMON CP-B
IT
E
RROR
E
VENT
C
OUNT
R
EGISTER
- LSB H
EX
A
DDRESS
: 0
X
75
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
CP-bit Error Count Low-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON CP-Bit Error Count
Register - MSB” contains the 16 bit value for the total number of CP Bit
errors that have been detected since the last read of this register. This reg-
ister contains the “Low” byte value of this 16-bit expression.
T
ABLE
119:
F
RAME
CP-B
IT
E
RRORS
- O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- MSB
R
EGISTER
118 F
RAME
CP-B
IT
E
RRORS
- O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- MSB H
EX
A
DDRESS
: 0
X
76
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
CP- Bit Err 1 Sec H
RO
0x00
This “Read-Only” register, along with “CP-Bit Errors - One Second Accmula-
tor Register - LSB” contains the 16-bit expression for the total number of CP-
bit errors that have been detected within the last one second accumulation
period. This register contains the “High” byte value of this expression.
T
ABLE
120:
F
RAME
CP-B
IT
E
RRORS
- O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- LSB
R
EGISTER
119 F
RAME
CP-B
IT
E
RRORS
- O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- LSB H
EX
A
DDRESS
: 0
X
77
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
CP- Bit Err 1 Sec L
RO
0x00
This “Read-Only” register, along with “CP-Bit Errors - One Second Accmula-
tor Register - MSB” contains the 16-bit expression for the total number of
CP-bit errors that have been detected within the last one second accumula-
tion period. This register contains the “Low” byte value of this expression.
T
ABLE
121:
U
NUSED
R
EGISTER
120
TO
133 U
NUSED
H
EX
A
DDRESS
: 0
X
78
H
TO
0
X
85
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION