- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376461 > XRT72L73 (Exar Corporation) Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 PDF資料下載
參數(shù)資料
| 型號： | XRT72L73 |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 20/105頁 |
| 文件大小： | 1307K |
| 代理商： | XRT72L73 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當(dāng)前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁
XRT72L73
THREE CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
REV. P1.0.1
á
PRELIMINARY
20
B16
A16
C15
TxLev_0
TxLev_1
TxLev_2
O
Transmit Line Build Enable/Disable Select (to be connected to the TxLev
input pin of the XRT73L03 E3/DS3/STS-1 LIU IC):
This output pin is intended to be connected to the TxLev input pin of the XRT73L03
E3/DS3/STS-1 LIU IC. The user can control the state of this output pin by writing a
“0” or a “1” to Bit 2 (TxLev) within the Line Interface Driver Register (Address =
0x72).
If the user commands this signal to toggle “High” then it will disable the “Transmit
Line Build-Out” circuitry within the XRT73L03 device. In this case, the XRT73L03
will output unshaped (square-wave) pulses onto the “Transmit Line Signal”. In
order to insure that the XRT73L03 generates a line signal that is compliant with the
Bellcore GR-499-CORE Pulse Template requirements (at the DSX-3 Cross-Con-
nect), the user is advised to set this output pin “High”, if the cable length (between
the Transmit Output of the XRT73L03 and the DSX-3 Cross-Connect) is greater
than 225 feet.
Conversely, if the user commands this signal to toggle “High”, then it will enable
the “Transmit Line Build-Out” circuitry within the XRT73L03 device. In this case,
the XRT73L03 will output shaped pulses onto the “Transmit Line Signal”. In order
to ensure that the XRT73L03 generates a line signal that is compliant with the
Bellcore GR-499-CORE Pulse Template requirements (at the DSX-3 Cross-Con-
nect), the user is advised to set this output pin “Low”, if the cable length (between
the Transmit Output of the XRT73L03 and the DSX-3 Cross Connect) is less than
225 ft. of cable.
Writing a “1” to Bit 2 of the Line Interface Drive Register (Address = 0x72) will
cause this output pin to toggle “High”. Writing a “0” to this bit-field will cause this
output pin to toggle “Low”.
N
OTE
:
If the customer is not using the XRT73L03 DS3/E3/STS-1 LIU IC, then this
output pin can be used for other purposes.
Tx DS3 Framer
A12
D12
C11
TxAISEn_0
TxAISEn_1
TxAISEn_2
I
Transmit AIS Pattern input:
When this input pin is pulled “High” then the Transmit DS3 Framer block will insert
the AIS pattern into the DS3 output data stream.
A11
B10
A10
TxFrame_0
TxFrame_1
TxFrame_2
O
Transmit End of DS3 Frame Indicator:
The function of this pin is same in both Clear Channel and ATM UNI modes of the
XRT72L73. This pin marks the end of each DS3 frame.
ATM UNI Mode
This pin is pulsed for one DS3 clock period when the transmit input interface is
processing the last bit of the given DS3 frame. This just serves as an indication to
terminal equpiment in the ATM UNI mode.
Clear Channel Mode
When the XRT72L73 is configured to operate in the “Clear-Channel Framer”
mode, then the Transmit DS3 Framer block will pulse this output pin “High” (for one
bit period) when the “Transmit Payload Data Input Interface” block is processing
the last bit of a given DS3 frame.
The purpose of this output pin is to alert the Terminal Equipment that it needs to
begin transmission of a new DS3 frame to the XRT72L73 (e.g., to permit the
XRT72L73 to maintain Transmit DS3 framing alignment control over the Terminal
Equipment).
PIN DESCRIPTIONS
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT72L74 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT7300IV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300 | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7302 | 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元) |
| XRT73L02M | TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT72L73IB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XRT72L74IB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XRT7300 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300ES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT7300IV | 功能描述:外圍驅(qū)動器與原件 - PCI . . RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。