
á
PRELIMINARY
THREE CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER IC
XRT72L73
REV. P1.0.0
II
edge of RxLineClk) ....................................................................................................................... 44
Figure 12. Receive DS3 Framer Line Interface Input Signal Timing (RxPOS and RxNEG are sampled on the
falling edge of RxLineClk) ............................................................................................................ 44
Figure 13. Receive PLCP Processor—POH Byte Serial Output Port Interface Timing .................................. 44
Figure 14. GFC Nibble-Field Serial Output Port Timing (Receive Cell Processor) ........................................ 45
Figure 15. Receive UTOPIA Interface Block Timing ...................................................................................... 45
Figure 16. Microprocessor Interface Timing - Intel Type Programmed I/O Read Operations ........................ 46
Figure 17. Microprocessor Interface Timing - Intel Type Programmed I/O Write Operations ........................ 46
Figure 18. Microprocessor Interface Timing—Motorola Type Processors (Read Operations) Non-Burst Mode .
47
Figure 19. Microprocessor Interface Timing—Motorola Type Processor (Write Operations) Non-Burst Mode ...
47
Figure 20. Microprocessor Interface Timing - Reset Pulse Width .................................................................. 47
LIST OF REGISTERS ....................................................................................................... 48
R
EGISTER
SUMMARY
L
IST
.......................................................................................................................... 48
PACKAGE DIMENSIONS ............................................................................................... 102
R
EVISIONS
............................................................................................................................................... 103
TABLE OF CONTENTS .................................................................................................................................... I