參數(shù)資料
型號： TECO3264
廠商： Lineage Power
英文描述： 32-Channel Echo Canceller(32通道回波清除器)
中文描述： 32通道回聲消除器（32通道回波清除器）
文件頁數(shù)： 59/128頁
文件大?。?/td> 2328K
代理商： TECO3264
Data Sheet
August 1999
TECO3264 32-Channel Echo Canceller
59
Lucent Technologies Inc.
Register Architecture
(continued)
Symbol to Register Address and Function Name Index
Note:
Register addresses with a 0 in the most significant digit are page 0 read/write registers. Register addresses
with 1 in the most significant digit are page 1 read-only registers. Register addresses 000—01F are per-
channel registers and register addresses 020—07F are all-channel 0—31 registers. Mask parameters are
read/write.
Table 23. Symbol to Register Address and Function Name Index
Symbol
Register
Address
073
02E
057
058
071
07A
03E
102
103
03F
102
103
000—01F
02E
104
07F
05D
045
02A
02F
02E
02E
065
02F
02F
102
103
000—01F
102
103
065
000—01F
03A
03A
105, 106
Function Name
Bits
Page
ADATA[7:0]
AEN
AN1[4:0]
AN2[5:0]
AVOICE[7:0]
B3[7:0]
BADCT[1:0]
BADRANGE
BADRANGEM
BADVPACT[1:0]
BADWRITE
BADWRITEM
CALLB
CCODEC
CDATAVFX[7:0]
CENABLE
CLRN
CLRNTD
CMS
CPY[2:0]
CUAADJ
CULAW
CUPDIS
CXBOFF[3:0]
CXCE
DAUOVERFLO
DAUOVERFLOM
DEC
DMPYERR
DMPYERRM
DRINIT
EBP
ECODEC
ECOMP
EDATAVFX[15:0]
Alpha Data
Linear PCM Port Enable
Noise Floor Scaling Factor 2
Noise Floor Scaling Factor 1
Alpha Voice
Near-End Speech (NES) Compare Threshold
Bad Interval Count
Address Error
Address Error Mask
Bad Interval Count VPA
Write Error
Write Error Mask (mask interrupt)
Call Boundary, Channel 0—31
C Invert
C Test Data
Clamp ê Enable
Clear Nonlinear Processor (NLP) State Variables (SV)
Clear TD SV Storage
Bit Rate Select
C Parity
Conversion
μ
-A and A-
μ
Adjustment
C Output
μ
-Law/A-Law Select
Convolution Update Processor (CUP) Disable
C Transmit Bit Offset
C Transmit Clock Edge
Digital Arithmetic Unit (DAU) Overflow Error
DAU Overflow Error Mask (mask interrupt)
Disable Echo Canceller, Channel 0—31
DAU Parity Error
DAU Parity Error Mask (mask interrupt)
Memory Initialization 1: D-RAM
64-Clear/Bypass Enable, Channels 0—31
E Invert
E Data Format
E Test Data
8
1
5
6
8
8
2
1
1
2
1
1
1
1
8
1
7
1
1
3
1
1
1
4
1
1
1
1
1
1
1
1
1
1
16
109
76
95
96
107
111
84
116
116
85
116
116
66
76
117
113
98
87
74
77
76
76
101
77
77
116
116
65
116
116
101
65
82
82
117, 117
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