參數(shù)資料
型號: TECO3264
廠商: Lineage Power
英文描述: 32-Channel Echo Canceller(32通道回波清除器)
中文描述: 32通道回聲消除器(32通道回波清除器)
文件頁數(shù): 13/128頁
文件大小: 2328K
代理商: TECO3264
Data Sheet
August 1999
TECO3264 32-Channel Echo Canceller
13
Lucent Technologies Inc.
Functional Description
X(PCM/Linear) Highway Control (XPCM)
XPCM provides all the PCM transport and format con-
version functions for the X to C direction of the trans-
mission. In addition, it provides a separate linear X
input which can be used to interface an external copro-
cessor device. The block also provides parallel linear
and companded PCM outputs to the convolution pro-
cessor, control, and tone disabler blocks. The parity
detection and generation as well as EC vector X test
data insertion and C data readback functions are also
performed in this block. Programmable bulk delay on
the PCM data is provided to allow up to one complete
frame delay through the device. A high-pass filter
(>10 Hz) is provided for x(t) prior to the convolution/
update block.
Y(PCM/Linear) Highway Control (YPCM)
YPCM implements the YPCM input functions and for-
mat conversion to linear for the convolution processing.
Parity detection is performed on the YPCM input, and
errors are reported to the control interface. The EC
vector Y test data insertion function is performed in this
block. Programmable bulk delay is provided to allow
arbitrary time-slot alignment of the Y input signal rela-
tive to the sync pulse. A high-pass filter (>10 Hz) is pro-
vided for y(t) prior to the convolution/update block.
E(PCM/Linear) Highway Control (EPCM)
EPCM performs the EPCM output formatting and EC
enable/disable and bypass functions. Conversion from
linear to companded PCM format is provided. Parity
generation on the EPCM output signal is performed.
Delay equalization for the EC enable/disable and
bypass functions is accomplished by the use of pro-
grammable bulk delay blocks. An additional program-
mable bulk delay block allows up to one full frame
delay for the Y to E direction of the transmission.
Convolution/Update Processor (CUP)
The primary function of the convolution/update proces-
sor (CUP) is to create a replica, (t), of the echo path
impulse response, h(t). The PCM samples at the C port
of the canceller are convolved with (t) to generate an
estimate, (t), of the echo signal y(t). The echo esti-
mate, (t), is subtracted from the echo signal, y(t), to
form the error signal, (t) ( is pronounced as ehat),
which is the main output from the convolution/update
processor.
In order to make the convergence time independent of
signal power, the gain is normalized by a measure of C
signal power before being applied to the update func-
tion. The power measure is the larger of the power esti-
mated from the sum of squares of the samples in the
register, or the power estimated from the peak signal in
the register multiplied by a peak factor.
An H-reset input is provided that sets all H taps to zero.
H-register freeze is achieved in the controller by setting
both the gain and leak values equal to zero. The
H reset must be applied for 500 ms. A serial H-register
display output is provided via HDSP (pin 53).
Nonlinear Processor (NLP)
The nonlinear processor (NLP) provides all the func-
tions necessary for the processing of the residual echo.
When enabled, the NLP can select from a variety of
alternate signal sources to switch into the signal path
for transmission on the EPCM output. These alternate
sources include quiet, noise matching, colored noise
matching, or a variably attenuated (t). The main func-
tion of the NLP is to generate these alternate sources
and switch the appropriate source into the signal path
when enabled by the control function. The NLP accepts
parametric inputs which determine the nature of the
selected alternate signal source. With the soft NLP
mode, the chosen comfort noise is inserted in a grad-
ual programmable fashion.
Tone Disablers (TD1, TD2)
The tone disabler functions (TD1, TD2) provide the
means to disable the echo cancellation function when
data or other specified tone signals are transmitted
through the echo canceller. This is accomplished by
detecting 2100 Hz tones with or without phase rever-
sals. The tone detection is performed on a per-channel
basis for both X and Y directions. The tone disablers
are tunable and capable of detecting tones in fre-
quency range and signal levels that are compliant for
voice path assurance (VPA) detection.
Microprocessor Interface and Control
(MPIC)
The microprocessor interface and control block func-
tion is to provide microprocessor access to the control,
provisioning, status, and alarm registers of the echo
canceller and to generate the signals required to con-
trol the operation of all echo canceller functions. The
functions performed in the MPIC block are described in
greater detail in the External Control Connection sec-
tion on page 14.
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