參數(shù)資料
型號(hào): STLC1502
廠商: 意法半導(dǎo)體
英文描述: VOICE OVER IP PROCESSOR
中文描述: IP語音處理器
文件頁數(shù): 2/81頁
文件大小: 526K
代理商: STLC1502
STLC1502
2/81
Data Modem: V.34 datapump
Rate selection
High performance voice activity detector (VAD)
Comfort noise generator (CNG)
G.165 32 ms Line & acoustic echo canceller
Low latency system implementation
Figure 1: Block diagram
3.0 SYSTEM OVERVIEW
Three main blocks can be identified in the device architecture: ARM domain, the D950 domain and the
Clocks tree domain.
3.1 ARM7 domain
The ARM domain is a multibus microprocessor system based on the ARM7TDMI processor.
The system bus is based on the Advanced Microcontroller Bus Architecture (AMBA) that includes
two distinct buses:
The Advanced High performance Bus (AHB) for high performances system modules
The Advanced Peripheral Bus (APB) for low power peripherals.
A high speed 32 bit data bus is provided to connect external memories.
A controller for external static memory (ESM) and a controller for external dynamic memory (EDM)
are provided.
Static memories, like FLASH EPROM, SRAM and dynamic memories like EDO, SDRAM, can be
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