參數(shù)資料
型號: STLC1512
廠商: 意法半導(dǎo)體
英文描述: NorthenLite⑩ G.lite BiCMOS Analog Front-End Circuit
中文描述: NorthenLite⑩G.lite的BiCMOS模擬前端電路
文件頁數(shù): 1/26頁
文件大小: 329K
代理商: STLC1512
1/26
STLC1512
November 2000
This is preliminary information on a new product now in development. Details are subject to change without notice.
I
Low power architecture -- Class AB, current
drive, output stage through a centre tapped
transformer to facilitate power supply switching
between 5.0V and a lower voltage. (3.3V in the
reference design) This gives a reduction in
power consumption.
I
480mW power consumption with a typical G.lite
signal.
I
600mA current driving capability
I
Positive +5.0V and one lower supply. (3.3V in
the reference design)
I
Switching power supplies to save power
I
Thermal overload shutdown
I
Four programmable receive gains
I
Opamp for a low pass filter in the receive path
I
Undedicated opamp with separate power down
control (used as a transmit path filter in the
reference design)
I
Separate power down control for Tx and Rx
path
I
48-pin TQFP (7x7x1.4mm) package
1.0 GENERAL DESCRIPTION
The STLC1512 G.lite line driver chip contains the line
driver as well as part of the receive path required in a
central office G.lite modem. It provides an interface
between the AFE chip (STLC1511) and the tele-
phone line. The line driver chip has been designed
with low power consumption, high signal to noise
plus distortion ratio and high current driving capabili-
ty.
TQFP48 (7x7x1.40)
ORDERING NUMBER: STLC1512
PRODUCT PREVIEW
NorthenLite G.lite Loop Driver
Figure 1. Block Diagram
TXANG
RBIAS
REF2P5
RXPD
AMPPD
TXPD
LPFOUT
LPFIN
DCFBON
PAIN
DCFBOP
AMPIN
FPN
PAONx
FPP
PWRVEEx
PAIP
PAOPx
BUFFP
BUFFN
PGA
RX REF
Buffer
LPF AMP
BIAS
Thermal
Shutdown
Preamp
Power
Stage
DC
Feedback
Amp
OPAMP
Buffer
PGAIN
PGA1
PGA0
PGAOUT
RXANG
DCFBIN
DCFBIP
AMPIP
AMPOUT
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