參數(shù)資料
型號(hào)： STLC1512
廠商： 意法半導(dǎo)體
英文描述： NorthenLite⑩ G.lite BiCMOS Analog Front-End Circuit
中文描述： NorthenLite⑩G.lite的BiCMOS模擬前端電路
文件頁(yè)數(shù)： 2/26頁(yè)
文件大?。?/td> 329K
代理商： STLC1512
STLC1512
2/26
1.0 GENERAL DESCRIPTION
The line driver transmit path contains a preamplifier
followed by a power output stage. The power stage
has current outputs that directly drive the primary
side of a center tapped transformer.
The receive path contains a programmable gain am-
plifier followed by an opamp which is used with off
chip passive components in an active low pass filter.
The Programmable Grain Amplifier (PGA) has four
steps optimized for the recommended G.lite CO line
interface.
There is also an undedicated opamp which can be
used for active filtering in either the transmit or re-
ceive paths
2.0 PACKAGING AND PIN INFORMATION
2.1 Package Technology
STLC1512 will be packaged in a TQFP 48 package,
according to JEDEC Specification reference MS-
026-BBC.
2.2 STLC1512 Pin Allocation
The pin out for the STLC1512 is depicted in the fol-
lowing Figure 2.
Figure 2. STLC1512 pinout
NC
481
TQFP48 (7x7x1.4mm)
TXANG
FPP
RBIAS
REF2P5
P
P
R
R
R
R
T
Q
P
P
R
A
RXPD
LPFOUT
LPFIN
NC
DCFBON
DCFBOP
FPN
PAIP
PAIN
A
A
A
T
T
T
T
T
T
Q
D
D
PWRVEE1
PWRVEE2
PAOP1
PAOP2
BUFFP
BUFFN
PAON1
PAON2
PWRVEE3
PWRVEE4
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