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參數資料
| 型號： | STLC1502 |
| 廠商： | 意法半導體 |
| 英文描述： | VOICE OVER IP PROCESSOR |
| 中文描述： | IP語音處理器 |
| 文件頁數： | 12/81頁 |
| 文件大?。?/td> | 526K |
| 代理商： | STLC1502 |
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STLC1502
12/81
6.2 ESM interface
The ESM (External Static Memory) interface is used to access static RAMs or Flash devices. It pro-
vides 3 chip select signals and gives external access to 21 address bits, so that the memory space
accessible through each chip select is 4 Mbytes.
The data bus on ESM external interface is 32bits wide, with the additional ability to perform 16 and 8
bits accesses. Little endian byte ordering is used. The data bus and address bus pins are shared with
the DRAM driver, using EBI interface.
Programmable per chip-select wait-states from 0 to 15 internal clock cycles are available.
At reset, every CS space has 15 wait states. The actual value is contained in the downloaded code.
The external memory spaces are mapped by the ESM interface as reported in Figure 4.
There are 3 addressable memory spaces 0x00400000 byte long each.
Figure 4: ESM memory map
Following is the list of the available external signals that implement SRAM or FLASH read and write cycles. Data
and address buses are not shown as they are shared with the DRAM EBI interface.
NAME
Signal type
Description
ESM_CS(2:0)
OUT
Chip Select. Asserted when the
ESM decodes the proper address
space in order to select the right
external device
OE
OUT
Output Enable. Asserted during a
read cycle (shared with EDM)
External
Memories
ESM
04000000
ESM_CS1
ESM_CS0
ESM_CS2
Reserved
04000000
043FFFFF
047FFFFF
04800000
04BFFFFF
04C00000
07FFFFFF
07FFFFFF
04400000
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