
Pemnr
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Filename:
SAA7115_Datasheet.fm
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page 94
Last edited by H. Lambers
Philips Semiconductors
CS-PD Hamburg
CVIP2
Datasheet
SAA7115
Date:
10/23/01
Version:
0.67
9.4.1
X-
PORT CONFIGURED AS OUTPUT
If data output is enabled at the expansion port, then the data stream from the decoder is presented. The data format of
the 8-bit data bus is dependent on the chosen data type, selectable by the line control registers LCR2 to LCR24; see
Table 6. In contrast to the image port, the sliced data format is not available on the expansion port. Instead, raw CVBS
samples are always transferred if any sliced data type is selected.
Some details of data types on the expansion port are as follows:
Active video
(data types 0 and 15): contains component Y-C
B
-C
R
amplitude and offsets are programmable via DBRI7 to DBRI0, DCON7 to DCON0, DSAT7 to DSAT0, OFFU1,
OFFU0, OFFV1 and OFFV0. For nominal levels see Fig.18.
Test line
(data type 14): is similar to the active video format, with some constraints within the data processing:
– adaptive chrominance comb filter, vertical filter (chrominance comb filter for NTSC standards, PAL phase error
correction) within the chrominance processing are disabled
– adaptive luminance comb filter, peaking and chrominance trap are bypassed within the luminance processing
This data type is defined for future enhancements. It could be activated for lines containing standard test signals within
the vertical blanking period. Currently the most sources do not contain test lines. For nominal levels see Fig.18.
Raw samples
(data types 1 to 13): C
B
-C
R
samples are similar to data type 6, but CVBS samples are transferred
instead of processed luminance samples within the Y time slots.
The amplitude and offset of the CVBS signal is programmable via RAWG7 to RAWG0 and RAWO7 to RAWO0; see
Chapter 16, Tables 78 and 79. For nominal levels see Fig.19.
The relationship of LCR programming to line numbers is described in Section 8.4, see Tables 7 to 10.
The data type selections by LCR are overruled by setting OFTS[3:0] = 1110 (ADC1 bypass mode) or OFTS[3:0] = 1111
(ADC2 bypass mode) at subaddresses 1BH, bit 4 and 13H bit 2 to 0. This setting is mainly intended for device production
test. The X-port (XPD[7:0]) carries the upper 8 bits of either of the two ADCs, the LSB is provided on pin XRH; see
Table 72 “RT / X-port output control (SA 13, SA 1B)”. The analog input configuration is done via MODE[3:0] 02H[3:0]
settings; see table 53 “Analog control 1 (SA 02)”. No timing reference codes are generated in this mode.
The SAV/EAV timing reference codes define the start and end of valid data regions. The ITU-blanking code sequence
‘- 80 - 10 - 80 - 10 -...’ is transmitted during the horizontal blanking period between EAV and SAV.
The position of the F-bit is constant in accordance with ITU 656; see Tables 38 and 39.
The V-bit can be generated in two different ways (see Tables 38 and 39) controlled via OFTS1 and OFTS0; see
Table 72.
In case of enabling 10-bit video output mode via OFTS[3:0] then XPD[7:0] carries the video data bits 9 to 2 and SAV/EAV
codes and the signals XRH and XRV the data LSBs 1 and 0 respectively. During blanking both LSBs are zero.
The F and V bits change synchronously with the EAV code.
Table 36
Data format on the expansion port
Notes
1.
The generation of the timing reference codes and the ITU-blanking code sequence can be suppressed by setting
OFTS[3:0] to ‘x010’, see Table 72.
If raw samples or sliced data are selected by the line control registers (LCR2 to LCR24), the Y samples are replaced
2.
BLANKING
PERIOD
TIMING
REFERENCE
CODE (HEX)
(1)
720 PIXELS Y-C
B
-C
R
4 : 2 : 2 DATA
(2)
TIMING
REFERENCE
CODE (HEX)
(1)
BLANKING
PERIOD
...
80
10
FF 00 00 SAV
CB
0
Y0
CR
0
Y1
CB
2
Y2 ...
CR71
8
Y719 FF 00 00 EAV
80
10
...