
146
S71WS-Nx0 Based MCPs
S71WS-N_01_A4 September 15, 2005
A d v a n c e I n f o r m a t i o n
34 Pin Description
35 Power Up Sequence
After applying V
CC
up to minimum operating voltage (1.7V), drive CS# high first and then drive
MRS# high. This gets the device into power up mode. Wait 200 μs minimum to get into the normal
operation mode. During power up mode, the standby current cannot be guaranteed. To obtain
stable standby current levels, at least one cycle of active operation should be implemented re-
gardless of wait time duration. To obtain appropriate device operation, be sure to follow the
proper power up sequence.
1.
2.
Apply power.
Maintain stable power (V
CC
min.= 1.7V) for a minimum 200 μs with CS# and MRS# high.
Pin Name
CLK
ADV#
MRS#
Function
Clock
Address Valid
Mode Register set
Type
Description
Input
Commands are referenced to CLK
Valid Address is latched by ADV falling edge
MRS# low enables Mode Register to be set
CS# low enables the chip to be active
CS# high disables the chip and puts it
into standby mode
OE# low enables the chip to output the data
WE# low enables the chip to
start writing the data
CS#
Chip Select
OE#
Output Enable
WE#
Write Enable
LB#
UB#
Lower Byte (I/O
0
–
7
)
Upper Byte (I/O
8
–
15
)
UB# (LB#) low enables upper byte
(lower byte) to start operating
A0-A22
Address 0
–
Address 22
Valid addresses input when ADV is low
Mode setting input when MRS is low
Depending on UB# or LB# status, word (16-bit,
UB#, and LB# low) data, upper byte (8-bit, UB#
low & LB# high) data or lower byte (8-bit, LB# low,
and UB# high) data is loaded
Core Power supply
I/O Power supply
Core ground Source
I/O Ground Source
WAIT# indicates whether data is valid or not
I/O0-I/O15
Data Inputs / Outputs
Input/Output
V
CC
V
CCQ
V
SS
V
SSQ
WAIT#
Voltage Source
Voltage Source
Ground Source
I/O Ground Source
Valid Data Indicator
Power
Power
GND
GND
Output