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參數(shù)資料
| 型號： | S71WS512NC0BAWA62 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP） |
| 文件頁數(shù)： | 100/188頁 |
| 文件大?。?/td> | 2252K |
| 代理商： | S71WS512NC0BAWA62 |
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98
S71WS-Nx0 Based MCPs
S71WS-N_01_A4 September 15, 2005
A d v a n c e I n f o r m a t i o n
16 Commonly Used Terms
Term
Definition
ACC
ACCelerate.
A special purpose input signal which allows for faster programming or
erase operation when raised to a specified voltage above V
CC
. In some devices ACC
may protect all sectors when at a low voltage.
A
max
Most significant bit of the address input [A23 for 256Mbit, A22 for128Mbit, A21 for
64Mbit]
A
min
Least significant bit of the address input signals (A0 for all devices in this document).
Asynchronous
Operation where signal relationships are based only on propagation delays and are
unrelated to synchronous control (clock) signal.
Autoselect
Read mode for obtaining manufacturer and device information as well as sector
protection status.
Bank
Section of the memory array consisting of multiple consecutive sectors. A read
operation in one bank, can be independent of a program or erase operation in a
different bank for devices that offer simultaneous read and write feature.
Boot sector
Smaller size sectors located at the top and or bottom of Flash device address space.
The smaller sector size allows for finer granularity control of erase and protection for
code or parameters used to initiate system operation after power-on or reset.
Boundary
Location at the beginning or end of series of memory locations.
Burst Read
See
synchronous read
.
Byte
8 bits
CFI
Common Flash Interface. A Flash memory industry standard specification [JEDEC 137-
A and JESD68.01] designed to allow a system to interrogate the Flash to determine its
size, type and other performance parameters.
Clear
Zero (Logic Low Level)
Configuration Register
Special purpose register which must be programmed to enable synchronous read
mode
Continuous Read
Synchronous method of burst read whereby the device reads continuously until it is
stopped by the host, or it has reached the highest address of the memory array, after
which the read address wraps around to the lowest memory array address
Erase
Returns bits of a Flash memory array to their default state of a logical One (High Level).
Erase Suspend/Erase Resume
Halts an erase operation to allow reading or programming in any sector that is not
selected for erasure
BGA
Ball Grid Array package. Spansion LLC offers two variations: Fortified Ball Grid Array
and Fine-pitch Ball Grid Array. See the specific package drawing or connection diagram
for further details.
Linear Read
Synchronous (burst) read operation in which 8, 16, or 32 words of sequential data with
or without wraparound before requiring a new initial address
.
MCP
Multi-Chip Package. A method of combining integrated circuits in a single package by
stacking
multiple die of the same or different devices.
Memory Array
The programmable area of the product available for data storage.
MirrorBit Technology
Spansion trademarked technology for storing multiple bits of data in the same
transistor.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71WS512NC0BAWA63 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BAWA70 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BAWA72 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BAWA73 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BAWAJ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
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