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參數(shù)資料
| 型號： | S71PL129JC0BFI9P3 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的快閃記憶體 |
| 文件頁數(shù)： | 45/149頁 |
| 文件大?。?/td> | 2693K |
| 代理商： | S71PL129JC0BFI9P3 |
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June 4, 2004 S29PL129J_MCP_00_A0
S29PL129J for MCP
45
A d v a n c e I n f o r m a t i o n
Command Definitions
Writing specific address and data commands or sequences into the command
register initiates device operations.
Table 12
defines the valid register command
sequences. Writing
incorrect
address and data values
or writing them in the
improper sequence
may place the device in an unknown state. A reset com-
mand is then required to return the device to reading array data.
All addresses are latched on the falling edge of WE# or CE# (CE1# / CE2# in
PL129J), whichever happens later. All data is latched on the rising edge of WE#
or CE# (CE1# / CE2# in PL129J), whichever happens first. See
AC Characteristics
for timing diagrams.
Reading Array Data
The device is automatically set to reading array data after device power-up. No
commands are required to retrieve data. Each bank is ready to read array data
after completing an Embedded Program or Embedded Erase algorithm.
After the device accepts an Erase Suspend command, the corresponding bank
enters the erase-suspend-read mode, after which the system can read data from
any non-erase-suspended sector within the same bank. The system can read
array data using the standard read timing, except that if it reads at an address
within erase-suspended sectors, the device outputs status data. After completing
a programming operation in the Erase Suspend mode, the system may once
again read array data with the same exception. See
“Erase Suspend/Erase Re-
sume Commands”
on page 50 for more information.
The system
must
issue the reset command to return a bank to the read (or erase-
suspend-read) mode if DQ5 goes high during an active program or erase opera-
tion, or if the bank is in the autoselect mode. See “
Reset Command
,” for more
information.
See
“Requirements for Reading Array Data”
on page 19 in
“Device Bus Opera-
tions”
for more information. The
AC Characteristics
table provides the read
parameters, and
Figure 12
shows the timing diagram.
Reset Command
Writing the reset command resets the banks to the read or erase-suspend-read
mode. Address bits are don’t cares for this command.
The reset command may be written between the sequence cycles in an erase
command sequence before erasing begins. This resets the bank to which the sys-
tem was writing to the read mode. Once erasure begins, however, the device
ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in a program
command sequence before programming begins. This resets the bank to which
the system was writing to the read mode. If the program command sequence is
written to a bank that is in the Erase Suspend mode, writing the reset command
returns that bank to the erase-suspend-read mode. Once programming begins,
however, the device ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in an autoselect
command sequence. Once in the autoselect mode, the reset command must be
written to return to the read mode. If a bank entered the autoselect mode while
in the Erase Suspend mode, writing the reset command returns that bank to the
erase-suspend-read mode.
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相關代理商/技術參數(shù) |
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| S71PL129JC0BFI9U0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
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| S71PL129JC0BFI9U3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
| S71PL129JC0BFI9Z0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
| S71PL129JC0BFI9Z2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
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