參數(shù)資料
型號: S71PL129JC0BFI9P3
廠商: Spansion Inc.
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory
中文描述: 堆疊式多芯片產(chǎn)品(MCP)的快閃記憶體
文件頁數(shù): 146/149頁
文件大?。?/td> 2693K
代理商: S71PL129JC0BFI9P3
146
pSRAM Type 7
pSRAM_Type07_13_A1 November 2, 2004
A d v a n c e I n f o r m a t i o n
Note:
The t
C2LH
specifies after V
DD
reaches specified minimum level.
Figure 69. Power-up Timing #1
Note:
The t
CHH
specifies after V
DD
reaches specified minimum level and applicable to both CE1# and CE2.
Figure 70. Power-up Timing #2
Note:
This Power Down mode can be also used as a reset timing if POWER-UP timing above could not be satisfied and
Power-Down program was not performed prior to this reset.
Figure 71. Power Down Entry and Exit Timing
t
C2LH
CE1#
V
DD
V
DD
min
0V
CE2
t
CHH
t
CHS
CE1#
V
DD
V
DD
min
0V
CE2
t
CHH
t
CSP
CE1#
Power Down Entry
CE2
t
C2LP
t
CHH
(t
CHHP
)
Power Down Mode
Power Down Exit
t
CHS
DQ
High-Z
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