參數(shù)資料
型號: S71PL129JC0BFI9P3
廠商: Spansion Inc.
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory
中文描述: 堆疊式多芯片產(chǎn)品(MCP)的快閃記憶體
文件頁數(shù): 125/149頁
文件大?。?/td> 2693K
代理商: S71PL129JC0BFI9P3
June 25, 2004 pSRAM_Type02_15A1
Type 2 pSRAM
125
A d v a n c e I n f o r m a t i o n
AC Characteristics (Ta = -40°C to 85°C, V
CC
= 2.7 to 3.1 V)
Notes:
1.
t
WP
(min)= 70ns for continuous write operation over 50 times.
Symbol
Parameter
Speed Bins
Unit
70ns
Min
Max
R
t
RC
Read Cycle Time
70
ns
t
AA
Address Access Time
70
ns
t
CO
Chip Select to Output
70
ns
t
OE
Output Enable to Valid Output
35
ns
t
BA
UB#, LB# Access Time
70
ns
t
LZ
Chip Select to Low-Z Output
10
ns
t
BLZ
UB#, LB# Enable to Low-Z Output
10
ns
t
OLZ
Output Enable to Low-Z Output
5
ns
t
HZ
Chip Disable to High-Z Output
0
25
ns
t
BHZ
UB#, LB# Disable to High-Z Output
0
25
ns
t
OHZ
Output Disable to High-Z Output
0
25
ns
t
OH
Output Hold from Address Change
5
ns
t
PC
Page Cycle Time
25
ns
t
PA
Page Access Time
20
ns
W
t
WC
Write Cycle Time
70
ns
t
CW
Chip Select to End of Write
60
ns
t
AS
Address Set-up Time
0
ns
t
AW
Address Valid to End of Write
60
ns
t
BW
UB#, LB# Valid to End of Write
60
ns
t
WP
Write Pulse Width
55 (Note 1)
ns
t
WR
Write Recovery Time
0
ns
t
WHZ
Write to Output High-Z
0
25
ns
t
DW
Data to Write Time Overlap
30
ns
t
DH
Data Hold from Write Time
0
ns
t
OW
End Write to Output Low-Z
5
ns
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