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參數(shù)資料
| 型號： | S71PL129JC0BFI9P3 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的快閃記憶體 |
| 文件頁數(shù)： | 132/149頁 |
| 文件大小： | 2693K |
| 代理商： | S71PL129JC0BFI9P3 |
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132
pSRAM Type 7
pSRAM_Type07_13_A1 November 2, 2004
A d v a n c e I n f o r m a t i o n
Power Down Program Sequence
The program requires 6 read/write operations with a unique address. Between
each read/write operation requires that device be in standby mode. The following
table shows the detail sequence.
The first cycle reads from the most significant address (MSB).
The second and third cycle are to write back the data (RDa) read by first cycle.
If the second or third cycle is written into the different address, the program is
cancelled, and the data written by the second or third cycle is valid as a normal
write operation.
The fourth and fifth cycles write to MSB. The data from the fourth and fifth cycles
is “don’t care.” If the fourth or fifth cycles are written into different address, the
program is also cancelled but write data might not be written as normal write
operation.
The last cycle is to read from specific address key for mode selection.
Once this program sequence is performed from a Partial mode to the other Partial
mode, the written data stored in memory cell array can be lost. So, it should per-
form this program prior to regular read/write operation if Partial mode is used.
Address Key
The address key has following format.
Cycle #
Operation
Address
Data
1st
Read
3FFFFFh (MSB)
Read Data (RDa)
2nd
Write
3FFFFFh
RDa
3rd
Write
3FFFFFh
RDa
4th
Write
3FFFFFh
Don’t Care (X)
5th
Write
3FFFFFh
X
6th
Read
Address Key
Read Data (RDb)
Mode
Address
32M
64M
A21
A20
A19
A18 - A0
Binary
Sleep (default)
Sleep (default)
1
1
1
1
3FFFFFh
4M Partial
N/A
1
1
0
1
37FFFFh
8M Partial
8M Partial
1
0
1
1
2FFFFFh
N/A
16M Partial
1
0
0
1
27FFFFh
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S71WS-J | Stacked Multi-Chip Product (MCP) |
| S71WS256PD0HF3SR3 | 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash Memory with CellularRAM |
| S71WS256PC0KF3SL2 | 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash Memory with CellularRAM |
| S71WS256PC0KF3SL3 | 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash Memory with CellularRAM |
| S71WS256PC0KF3SR0 | 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash Memory with CellularRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71PL129JC0BFI9U0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
| S71PL129JC0BFI9U2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
| S71PL129JC0BFI9U3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
| S71PL129JC0BFI9Z0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
| S71PL129JC0BFI9Z2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
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