參數(shù)資料
型號： S29CD016G0JFFM012
廠商： Spansion Inc.
英文描述： 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
中文描述： 32兆位（1米× 32位），16兆位（512k × 32的位），2.5伏，只有突發(fā)模式，雙啟動，同步讀/寫閃存與VersatileI內(nèi)存/輸出
文件頁數(shù)： 60/87頁
文件大?。?/td> 792K
代理商： S29CD016G0JFFM012
58
S29CD-G Flash Family
S29CD-G_00_B0 November 14, 2005
P r e l i m i n a r y
Table 43
shows the outputs for RY/BY#.
Figures
15
,
19
, and
21
show RY/BY# for read, reset, pro-
gram, and erase operations, respectively.
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete, or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at
any address, and is valid after the rising edge of the final WE# pulse in the command sequence
(prior to the program or erase operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, two immediately consecutive read
cycles to any address cause DQ6 to toggle. When the operation is complete, DQ6 stops toggling.
For asynchronous mode, either OE# or CE# can be used to control the read cycles. For synchro-
nous mode, the rising edge of ADV# is used or the rising edge of clock while ADV# is Low.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6
toggles for approximately 100 μs, then returns to reading array data. If not all selected sectors
are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the se-
lected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or
is erase-suspended. When the device is actively erasing (that is, the Embedded Erase algorithm
is in progress), DQ6 toggles. When the device enters the Erase Suspend mode, DQ6 stops tog-
gling. However, the system must also use DQ2 to determine which sectors are erasing or erase-
suspended. Alternatively, the system can use DQ7 (See
DQ7: Data# Polling
on page 56
).
If a program address falls within a protected sector, DQ6 toggles for approximately 1 μs after the
program command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embed-
ded Program algorithm is complete.
Table 43
shows the outputs for Toggle Bit I on DQ6.
Figure 7
shows the toggle bit algorithm in
flowchart form, and
Reading Toggle Bits DQ6/DQ2
on page 59
explains the algorithm.
Figure 24
shows the toggle bit timing diagrams.
Figure 24
shows the differences between DQ2 and DQ6 in
graphical form. Also see
DQ2: Toggle Bit II
on page 58
.
Figure 24
shows the timing diagram for
synchronous toggle bit status.
DQ2: Toggle Bit II
The
Toggle Bit II
on DQ2, when used with DQ6, indicates whether a particular sector is actively
erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-
suspended. Toggle Bit II is valid after the rising edge of the final WE# pulse in the command
sequence.
DQ2 toggles when the system performs two immediately consecutive reads at addresses within
those sectors that were selected for erasure. (For asynchronous mode, either OE# or CE# can be
used to control the read cycles. For synchronous mode, ADV# is used.) But DQ2 cannot distin-
guish whether the sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates
whether the device is actively erasing, or is in Erase Suspend, but cannot distinguish which sec-
tors are selected for erasure. Thus, both status bits are required for sector and mode information.
Refer to
Table 43
to compare outputs for DQ2 and DQ6.
Toggle bit algorithm in is shown in
Figure 7
in flowchart form, and the algorithm is explained in
Reading Toggle Bits DQ6/DQ2
on page 59
. Also see
DQ6: Toggle Bit I
on page 58
.
Figure 24
shows the toggle bit timing diagram.
Figure 25
shows the differences between DQ2 and DQ6 in
graphical form.
Figure 26
shows the timing diagram for synchronous DQ2 toggle bit status.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29CD016G0JFFM100 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM102 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM110 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM112 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM200 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
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