參數(shù)資料
型號： S29CD016G0JFFM012
廠商： Spansion Inc.
英文描述： 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
中文描述： 32兆位（1米× 32位），16兆位（512k × 32的位），2.5伏，只有突發(fā)模式，雙啟動，同步讀/寫閃存與VersatileI內(nèi)存/輸出
文件頁數(shù)： 57/87頁
文件大小： 792K
代理商： S29CD016G0JFFM012
November 14, 2005 S29CD-G_00_B0
S29CD-G Flash Family
55
P r e l i m i n a r y
Table 42. Sector Protection Command Definitions
Command ( Notes)
C
Bus Cycles ( Notes
1
–
4
)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Reset
1
XXX
F0
Secured Silicon Sector Entry
3
555
AA
2AA
55
555
88
Secured Silicon Sector Exit
4
555
AA
2AA
55
555
90
XX
00
Secured Silicon Protection Bit Status
6
555
AA
2AA
55
555
60
OW
RD(0)
Password Program (
5
,
7
,
8
)
4
555
AA
2AA
55
555
38
PWA[0-1]
PWD[0-1]
Password Verify
4
555
AA
2AA
55
555
C8
PWA[0-1]
PWD[0-1]
Password Unlock (
7
,
8
)
5
555
AA
2AA
55
555
28
PWA[0-1]
PWD[0-1]
PPB Program (
5
,
6
)
6
555
AA
2AA
55
555
60
SG+ WP
68
SG+ WP
48
SG+ WP
RD(0)
All PPB Erase (
5
,
9
,
10
)
6
555
AA
2AA
55
555
60
WP
60
WP
40
WP
RD(0)
PPB Status (
11
,
12
)
4
555
AA
2AA
55
BA+ 555
90
SA+ X02
00/01
PPB Lock Bit Set
3
555
AA
2AA
55
555
78
PPB Lock Bit Status
4
555
AA
2AA
55
BA+ 555
58
SA
RD(1)
DYB Write (
7
)
4
555
AA
2AA
55
555
48
SA
X1
DYB Erase (
7
)
4
555
AA
2AA
55
555
48
SA
X0
DYB Status (
12
)
4
555
AA
2AA
55
BA+ 555
58
SA
RD(0)
PPMLB Program (
5
,
6
)
6
555
AA
2AA
55
555
60
PL
68
PL
48
PL
RD(0)
PPMLB Status (
5
)
6
555
AA
2AA
55
555
60
PL
RD(0)
SPMLB Program (
5
,
6
)
6
555
AA
2AA
55
555
60
SL
68
SL
48
SL
RD(0)
SPMLB Status (
5
)
6
555
AA
2AA
55
555
60
SL
RD(0)
Legend:
DYB = Dynamic Protection Bit
OW = Address (A5–A0) is (011X10).
PPB = Persistent Protection Bit
PWA = Password Address. A0 selects between the low and high 32-bit
portions of the 64-bit Password
PWD = Password Data. Must be written over two cycles.
PL = Password Protection Mode Lock Address (A5–A0) is (001X10)
RD(0) = Read Data DQ0 protection indicator bit. If protected, DQ0= 1,
if unprotected, DQ0 = 0.
RD(1) = Read Data DQ1 protection indicator bit. If protected, DQ1 =
1, if unprotected, DQ1 = 0.
SA = Sector Address. The set of addresses that comprise a sector. The
system may write any address within a sector to identify that sector
for a command.
SG = Sector Group Address
BA = Bank Address. The set of addresses that comprise a bank. The
system may write any address within a bank to identify that bank for a
command.
SL = Persistent Protection Mode Lock Address (A5–A0) is (010X10)
WP = PPB Address (A5–A0) is (111010)
X = Don’t care
PPMLB = Password Protection Mode Locking Bit
SPMLB = Persistent Protection Mode Locking Bit
Notes:
1.
2.
3.
See
Table 27 on page 23
for description of bus operations.
All values are in hexadecimal.
Shaded cells in table denote read cycles. All other cycles are
write operations.
During unlock cycles, (lower address bits are 555 or 2AAh as
shown in table) address bits higher than A11 (except where BA
is required) and data bits higher than DQ7 are don’t cares.
The reset command returns the device to reading the array.
The fourth cycle programs the addressed locking bit. The fifth
and sixth cycles are used to validate whether the bit is fully
programmed. If DQ0 (in the sixth cycle) reads 0, the program
command must be issued and verified again.
Data is latched on the rising edge of WE#.
4.
5.
6.
7.
8.
The entire four bus-cycle sequence must be entered for each
portion of the password.
The fourth cycle erases all PPBs. The fifth and sixth cycles are
used to validate whether the bits were fully erased. If DQ0 (in
the sixth cycle) reads 1, the erase command must be issued and
verified again.
10. Before issuing the erase command, all PPBs should be
programmed in order to prevent over-erasure of PPBs.
11. In the fourth cycle, 00h indicates PPB set; 01h indicates PPB not
set.
12. The status of additional PPBs and DYBs may be read (following
the fourth cycle) without reissuing the entire command
sequence.
9.
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