參數(shù)資料
型號(hào)： S29CD016G0JFFM012
廠商： Spansion Inc.
英文描述： 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
中文描述： 32兆位（1米× 32位），16兆位（512k × 32的位），2.5伏，只有突發(fā)模式，雙啟動(dòng)，同步讀/寫(xiě)閃存與VersatileI內(nèi)存/輸出
文件頁(yè)數(shù)： 31/87頁(yè)
文件大?。?/td> 792K
代理商： S29CD016G0JFFM012
November 14, 2005 S29CD-G_00_B0
S29CD-G Flash Family
29
P r e l i m i n a r y
RESET# Control in Linear Mode
The RESET# pin immediately halts the linear burst access when taken to V
IL
. The DQ data bus
signal float. Additionally, the Configuration Register contents are reset back to the default condi-
tion where the device is placed in asynchronous access mode.
OE# Control in Linear Mode
The OE# (Output Enable) pin is used to enable the linear burst data on the DQ data bus pin. De-
asserting the OE# pin to V
IH
during a burst operation floats the data bus. However, the device
continues to operate internally as if the burst sequence continues until the linear burst is com-
plete. The OE# pin does not halt the burst sequence, this is accomplished by either taking CE#
to V
IH
or re-issuing a new ADV# pulse. The DQ bus remains in the float state until OE# is taken
to V
IL
.
I ND/ W AI T# Operation in Linear Mode
The IND/WAIT#, or End of Burst Indicator signal (when in linear modes), informs the system that
the last address of a burst sequence is on the DQ data bus. For example, if a 2-double-word linear
burst access is enabled using a 16-bit DQ bus (WORD# = V
IL
), the IND/WAIT# signal transitions
active on the second access. If the same scenario is used, the IND/WAIT# signal has the same
delay and setup timing as the DQ pins. Also, the IND/WAIT# signal is controlled by the OE# sig-
nal. If OE# is at V
IH
, the IND/WAIT# signal floats and is not driven. If OE# is at V
IL
, the IND/
WAIT# signal is driven at V
IH
until it transitions to V
IL
indicating the end of burst sequence. The
IND/WAIT# signal timing and duration is (See
Configuration Register
on page 31
for more infor-
mation). The following table lists the valid combinations of the Configuration Register bits that
impact the IND/WAIT# timing.
Note:
Operation is shown for the 32-bit data bus. Figure shown with 3-CLK initial access delay configuration, linear address,
4-doubleword burst, output on rising CLD edge, data hold for 1-CLK, IND/WAIT# asserted on the last transfer before wrap-
around.
Figure 2. End of Burst Indicator (IND/WAIT#) Timing for Linear 8-Word Burst Operation
Table 31. Valid Configuration Register Bit Definition for IND/WAIT#
DOC
W C
CC
Definition
0
0
1
IND/WAIT# = VIL for 1-CLK cycle, Active on last transfer, Driven on rising CLD edge
0
1
1
IND/WAIT# = VIL for 1-CLK cycle, Active on second to last transfer, Driven on rising CLK edge
CE#
CLK
ADV#
Addresses
OE#
Data
Address 1
Address 2
Invalid
D1
D2
D3
D0
Address 1 Latched
3 Clock Delay
IND/WAIT#
V
IL
V
IH
相關(guān)PDF資料
PDF描述
S29CD016G0JFFM100 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM102 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM110 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM112 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM200 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29CD016G0JFFM100 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM102 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM110 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM112 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFFM200 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
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