參數(shù)資料
型號： R5F6418JADFE
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP176
封裝： 24 X 24 MM, 0.50 MM PITCH, PLASTIC, LQFP-176
文件頁數(shù)： 23/128頁
文件大?。?/td> 922K
代理商： R5F6418JADFE
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
120
16.11.4 TCNT1H and TCNT1L – Timer/Counter1
The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct access, both for read and for
write operations, to the Timer/Counter unit 16-bit counter. To ensure that both the high and low bytes are read and written
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit temporary high byte register
(TEMP). This temporary register is shared by all the other 16-bit registers.
Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a compare match between TCNT1
and one of the OCR1x registers.
Writing to the TCNT1 register blocks (removes) the compare match on the following timer clock for all compare units.
16.11.5 OCR1AH and OCR1AL – Output Compare Register 1 A
16.11.6 OCR1BH and OCR1BL – Output Compare Register 1 B
The output compare registers contain a 16-bit value that is continuously compared with the counter value (TCNT1). A match
can be used to generate an output compare interrupt, or to generate a waveform output on the OC1x pin.
The output compare registers are 16-bit in size. To ensure that both the high and low bytes are written simultaneously when
the CPU writes to these registers, the access is performed using an 8-bit temporary high byte register (TEMP). This
temporary register is shared by all the other 16-bit registers. See Section 16.3 “Accessing 16-bit Registers” on page 100
16.11.7 ICR1H and ICR1L – Input Capture Register 1
The input capture is updated with the counter (TCNT1) value each time an event occurs on the ICP1 pin (or optionally on the
analog comparator output for Timer/Counter1). The input capture can be used for defining the counter TOP value.
The input capture register is 16-bit in size. To ensure that both the high and low bytes are read simultaneously when the
CPU accesses these registers, the access is performed using an 8-bit temporary high byte register (TEMP). This temporary
register is shared by all the other 16-bit registers. See Section 16.3 “Accessing 16-bit Registers” on page 100
Bit
765
4321
0
TCNT1[15:8]
TCNT1H
TCNT1[7:0]
TCNT1L
Read/Write
R/W
Initial Value
000
0000
0
Bit
7654
3210
OCR1A[15:8]
OCR1AH
OCR1A[7:0]
OCR1AL
Read/Write
R/W
Initial Value
0000
Bit
7654
3210
OCR1B[15:8]
OCR1BH
OCR1B[7:0]
OCR1BL
Read/Write
R/W
Initial Value
0000
Bit
7654
3210
ICR1[15:8]
ICR1H
ICR1[7:0]
ICR1L
Read/Write
R/W
Initial Value
0000
相關(guān)PDF資料
PDF描述
R5F64200LFB 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
R5F64200JFB 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
R5F64201JFB 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
R5F64201KFB 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
R5F6420FLFB 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
R5F6418JANFD 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU
R5F6418JANFE 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU
R5F6418JANFE_12 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU
R5F6418JAPFD 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU
R5F6418JAPFE 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*