
Data Sheet
123
Rev. 1.0, 2005-06-02
OctalLIUTM
PEF 22508 E
Register Description
Registers PC2 to PC3 have the same layout and description, but the 4 LSBs of PC3 are not used because only 2
MFPs in transmit direction exists.
The bits (3:0) of the register PC3 can be written and read, but are not valid.
Only one of the ports RPA, RPB or RPC must be configured as RTDMT.
Only one of the ports XPA or XPB must be configured as XLT or XLT.
The registers PC1, PC2 and PC4 have the reset values 00H, PC3 has the reset value F0H.
TCLK: Transmit Clock (Input)
A 2.048/8.192 MHz clock has to be sourced by the system if the internal generated transmit
clock (DCO-X) is not used. Optionally this input is used as a synchronization clock for the
DCO-X circuitry with a frequency of 2.048 MHz.
0011B
reserved
0100B
reserved
0101B
reserved
0110B
XCLK: Transmit Line Clock (Output)
Frequency: 2.048 MHz
0111B
XLT: Transmit Line Tristate control input, high active
With a high level on this port the transmit lines XL1/2 or XDOP/N are set directly into tristate.
This pin function is logically ORd with register XPM2.XLT. See Chapter 3.9.1.
1000B
GPI: General Purpose Input, low level
Value of this input is stored in register MFPI.
1001B
GPOH: General Purpose Output, high level
Pin is set fixed to high level
1010B
GPOL: General Purpose Output, low level
Pin is set fixed to low level
1011B
reserved
1100B
XDIN: Transmit Data In Negative
Negative transmit data in for dual rail mode
1101B
XLT: Transmit Line Tristate control input, low active
see XLT
1110B
reserved
1111B
Table 43
PCn Overview
Register Short Name
Register Long Name
Offset Address
Page Number
PC2
Port Configuration Register 2
xx81H
PC3
Port Configuration Register 3
xx82H
Table 44
Port Configuration Registers
7
6
5
4
3
2
1
0
PC1
RPC13
RPC12
RPC11
RPC10
XPC13
XPC12
XPC11
XPC10
PC2
RPC23
RPC22
RPC21
RPC20
XPC23
XPC22
XPC21
XPC20
PC3
RPC33
RPC32
RPC31
RPC30
XPC33
XPC32
XPC31
XPC30
Table 42
XPC1 Constant Values (cont’d)
Name and Description
Value