參數(shù)資料
型號: PF38F3050L0YUQ3A
廠商: INTEL CORP
元件分類: 存儲器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA88
封裝: 8 X 10 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, SCSP-88
文件頁數(shù): 1/70頁
文件大?。?/td> 1193K
代理商: PF38F3050L0YUQ3A
Order Number: 314476-001
August 2006
Intel StrataFlash Wireless Memory
(L18 SCSP)
768-Mbit L18 Family with Synchronous PSRAM
Datasheet
Product Features
Device Architecture
— Flash Die Density: 128 or 256-Mbit
— PSRAM Die Density: 32 or 64-Mbit
— x16 Non-Mux or ADMux I/O Interface Option
— Bottom or Top Flash Parameter
Configuration
Device Voltage
— Core: VCC = 1.8 V
— I/O: VCCQ = 1.8 V
Device Packaging
— Ballout: QUAD+ (88 Balls)
— Area: 8x10 mm to 11x13 mm
— Height: 1.2 mm to 1.4 mm
PSRAM Performance
— 70 ns Initial Read Access;
20 ns Asynchronous Page-Mode Read
— Up to 54 MHz with 9 ns Clock-to-Data
Synchronous Burst-Mode Reads and Writes
— Configurable 4-, 8-, 16- and Continuous-
Word Burst-Length Reads and Writes
— Partial-Array Self and Temperature-
Compensated Refresh
— Programmable Output Impedance
Flash Performance
— 85 ns Initial Read Access;
25 ns Asynchronous Page-Mode Read
— Up to 54 MHz with 14 ns Clock-to-Data
Output Synchronous Burst-Mode Read
— Buffered Enhanced Factory Programming
(BEFP): 5 s/byte (typ.)
— Write-buffer program: 7 s/Byte (typ.)
Flash Architecture
— Read-While-Write/Erase
— Asymmetrical blocking structure
— 8-Mbit or 16-Mbit partition sizes
— 16-Kword parameter blocks (Top or
Bottom); 64-Kword main blocks
— 2-Kbit One-Time Programmable Protection
Register
— Zero-latency block locking
— Absolute write protection with block lock
using F-VPP and F-WP#
Flash Software
—Intel FDI, Intel PSM, and Intel VFM
— Common Flash Interface
— Basic and Extended Flash Command Set
Quality and Reliability
— Extended Temperature –25 °C to +85 °C
— Minimum 100K Flash Block Erase cycles
— 130 nm ETOX VIII Flash Technology
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