參數(shù)資料
型號: PF38F3050L0YUQ3A
廠商: INTEL CORP
元件分類: 存儲器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA88
封裝: 8 X 10 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, SCSP-88
文件頁數(shù): 21/70頁
文件大?。?/td> 1193K
代理商: PF38F3050L0YUQ3A
768-Mbit LQ Family with Synchronous PSRAM
Intel StrataFlash Wireless Memory (L18 SCSP)
Datasheet
August 2006
28
Order Number: 314476-001
768-Mbit LQ Family with Synchronous PSRAM
Notes:
1.
Only used when AD-Mux I/O flash is present
2.
P-CRE and P-Mode share the same package ball location. Only one signal function is available,
depending on the stacked device combination.
3.
Only available on stacked device combinations with PSRAM, and/or SRAM die. Otherwise, it should be
treated as RFU.
P-VCC
Power PSRAM CORE POWER SUPPLY: PSRAM specific.
P-VCC supplies the core power to the PSRAM die if present. Otherwise it is an RFU.
3
S-VCC
Power SRAM POWER SUPPLY: SRAM specific.
S-VCC supplies the core power to the SRAM die if present. Otherwise it is an RFU.
3
VSS
Ground DEVICE GROUND: Global ground reference for all signals and power supplies.
Connect all VSS balls to system ground. Do not float any VSS connections.
DU
DO NOT USE:
This ball should not be connected to any power supplies, signals, or other balls. This ball can be left
floating.
RFU
RESERVED for FUTURE USE:
Reserved by Intel for future device functionality and enhancement. This ball must be left floating.
Table 8.
Signal Descriptions (Sheet 3 of 3)
Symbol Type
Signal Descriptions
Notes
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