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參數(shù)資料
| 型號(hào)： | PEF22508E |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DATACOM, PCM TRANSCEIVER, PBGA256 |
| 封裝： | 17 X 17 MM, 1 MM PITCH, PLASTIC, LBGA-256 |
| 文件頁(yè)數(shù)： | 154/193頁(yè) |
| 文件大?。?/td> | 10683K |
| 代理商： | PEF22508E |
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Data Sheet
63
Rev. 1.0, 2005-06-02
OctalLIU
TM
PEF 22508 E
Functional Description
either on the extracted receive clock RCLK or on a 2.048 MHz/8 kHz or 1.544 MHz/8 kHz clock provided on pin
SYNC (8 kHz in master mode only). The jitter attenuated DCO-R output clock can be output on pin RCLK and
FCLKR. Optionally an 8 kHz clock is provided on pin SEC
FSC.
For jitter attenuation the received data is written into the receive elastic buffer with the recovered clock sourced by
the clock & data recovery and are read out with the de-jittered clock sourced by DCO-R.
If the receive elastic buffer is read out directly with the recovered receive clock, no jitter attenuation is performed.
If the receive elastic buffer is read out with the receive framer clock FCLKR, the receive elastic buffer performs a
clock adoption from the recovered receive clock to FCLKR.
The DCO-R circuitry attenuates the incoming jittered clock starting at its corner frequency with 20 dB per decade
fall-off. Wander with a jitter frequency below the corner frequency is passed unattenuated. The intrinsic jitter in the
absence of any input jitter is < 0.02 UI.
The corner frequency of the DCO-R can be configured in a wide range, see Table 18 and Figure 23. The jitter
attenuator PLL in the transmit path, so called as DCO-X, is equivalent to the DCO-R so that the principle for its
configuring is the same.
After reset the corner frequencies are 2 Hz in E1 and 6 Hz in T1/J1 mode and can be switched to 0.2 Hz in E1
mode or 0.6 Hz n T1 mode by setting the register bit LIM2.SCF for the DCO-R or the register bit CMR5.SCFX for
the DCO-X respectively. A logical table builds the integral (I) and proportional (P) parameter for the PI filter of the
DCO-R or DCO-X, see Figure 23.
If the register bits CMR2.ECFAR or CMR2.ECFAX are set for the DCO-R or the DCO-X respectively, the corner
frequencies can be configured in a range between 2 Hz and 0.2 Hz using the register bits CMR3.CFAR(3:0) or
CMR3.CFAX(3:0) respectively, see CMR3, CMR4 and CMR5. A logical table builds the integral and proportional
parameter for the PI filter of the DCO-R or DCO-X out of the settings in CMR3.CFAR(3:0) or CMR3.CFAX(3:0)
respectively.
If additionally to CMR2.ECFAR or CMR2.ECFAX the bit CMR6.DCOCOMPN (CMR6) is set, which is valid for the
DCO-R and the DCO-X, the corner frequencies and attenuation factors can be programmed in a wide range using
the register bits CMR3.CFAR(3:0) and CMR4.IAR(4:0) for the DCO-R and CMR3.CFAX(3:0) and CMR5.IAX(4:0)
for the DCO-X. The settings in CMR3.CFAR(3:0)/CFAX(3:0) build the proportional parameter, the settings in
CMR4.IAR(4:0) and CMR5.IAX(4:0) build the integral parameter for the PI filters, independent from another.
Table 18
Overview DCO-R (DCO-X) Programming
CMR6.DCOCOMPN CMR2.ECFAR
(CMR2.ECFAX)
LIM2.SCF
(CMR6.SCFX)
CMR3.CFAR(3:0)
(CMR3.CFAX(3:0))
CMR4.IAR(3:0)
(CMR5.IAX(4:0))
Corner-
frequencies
of DCO-R
(DCO-X)
E1 / T1
X
0
Not used
2 Hz / 6 Hz
X
0
1
Not used
0.2 Hz / 0.6 Hz
0
1
X
7
H
4
H
Not used
0.2 Hz / 0.6 Hz
2 Hz / 6 Hz
1
X
0
H ...FH , used
as proportional
parameter
9
H
8
H
6
H
4
H
00
H ...1FH
used as integral
parameter
19
H
13
H
12
H
0F
H
Range 0.2 Hz
... 20 Hz
0.2 Hz
0.6 Hz
2 Hz
6Hz
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEF22508EV1.1-G | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T/E RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| PEF22508EV11G | 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: |
| PEF22508EV11GXP | 制造商:Lantiq 功能描述:LINE INTERFACE UNITS |
| PEF22508EV11GXT | 制造商:Lantiq 功能描述:LINE INTERFACE UNITS |
| PEF22509EV1.1 | 制造商:Infineon Technologies AG 功能描述:SP000205605_T/E ASIC_TY_PB |
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