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參數(shù)資料
| 型號： | PEF22508E |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DATACOM, PCM TRANSCEIVER, PBGA256 |
| 封裝： | 17 X 17 MM, 1 MM PITCH, PLASTIC, LBGA-256 |
| 文件頁數(shù)： | 151/193頁 |
| 文件大?。?/td> | 10683K |
| 代理商： | PEF22508E |
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OctalLIU
TM
PEF 22508 E
Functional Description
Data Sheet
60
Rev. 1.0, 2005-06-02
An overview about the tristate configurations of RDOP and RCLK is given in Table 15.
Switching between both channels can be done on the line side in transmit direction by a hardware signal if the
multi function pin XPA is configured as tristate input XLT by the register bits PC1.XPC1 = 1000
B, see PC1. If one
pin XPA is programmed as low active (PC1.XPC1 = 1110
B) and the one of the other channel as high active
(PC1.XPC1 = 1000
B), no external inverter is necessary as shown in Figure 21. So switching between both
channels on line side is possible using only one signal.
Switching can also be done on the line side in transmit direction by software, if setting the register bit XPM2.XLT.
The register bit value XPM2.XLT and the pin value of XPA are logically ORd. (That means if XPA is configured
as low active then tristate = XPM2.XLT or not(XPA).
Because the register bit XPM2.XLT and the multi function pin XPA exist individually for every channel, switching
on the line side in transmit direction can be done between channels of different or of the same OctalLIU
TM device
Switching between both channels can be done on the system side in receive direction by using the register bit
DIC3.RRTRI and with or without selection of the multi function port as RTDMT. If the RTDMT function is selected
the values of RTDMT and DIC3.RRTRI are logically exored. If in one of the both channels DIC3.RRTRI is set,
RTDMT is low active because of the logical exor, and if in the other channel DIC3.RRTRI is cleared, RTDMT is
low active because of the logical exor. So switching between both channels on system (framer) side in receive
direction is possible using only one signal.
By using the XLT, XLT and RTDMT function of the multi function ports and do the appropriate programming of the
bits DIC3.RRTRI (DIC3), switching between both channels can be done on the system and the line side together
with only one common signal, connected to XPA (XLT, XLT) and RPA (RTDMT), as shown in Figure 21 and
Table 16: If this signal has low-level channel 1 is active and channel 2 is in stand-by, if it has high level channel 1
is in stand-by and channel 2 is active.
Figure 22 shows a redundancy application for long haul mode using the internal analog switch. With the
configuration shown in Table 17, switching between both channels is possible using only one board signal which
is connected to XLT, XLT, RLT and RTDMT. Because the OctalLIU
TM builds the logical equivalence out of RLT
and LIM0.RTRS, the analog switches of both channels are controlled by these signal.
Table 15
Tristate Configurations for the RDO and RCLK pins
DIC3.RRTRI /
DIC3.RRTRI exor RTDMT
if RTDMT is selected on
multi function port
DIC3.RTRI
Pin RDOP
Pin FCLKX
1
X
Constant tristate (without
pull up and pull down
resistor)
Constant tristate (without
pull up and pull down
resistor)
0
Never tristate
0
1
Tristate during inactive
channel phases (with pull
up resistor
Never tristate
Table 16
Redundancy Application using RLM, switching with only one signal
Configuration
Register Bits
Channel 1
(active)
Channel 2
(stand-by)
XLT, XLT
PC1.XPC1(3:0)
1000
1110
RTDMT
PC1.RPC1(3:0)
1101
Receive system interface
DIC3.RRTRI
0
1
RLM mode
LIM0.RLM
0
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEF22508EV1.1-G | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T/E RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| PEF22508EV11G | 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: |
| PEF22508EV11GXP | 制造商:Lantiq 功能描述:LINE INTERFACE UNITS |
| PEF22508EV11GXT | 制造商:Lantiq 功能描述:LINE INTERFACE UNITS |
| PEF22509EV1.1 | 制造商:Infineon Technologies AG 功能描述:SP000205605_T/E ASIC_TY_PB |
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