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2001 Jun 19
63
Philips Semiconductors
Product specification
80C51 Ultra Low Power (ULP) telephony controller
P83CL882
6.10
Internal Data Memory
Internal Data Memory is mapped in Fig.31. The memory
space is divided into three blocks, which are referred to as
the lower 128, the upper 128, and SFR space.
Internal Data Memory addresses are always one byte
wide, which implies an address space of only 256 bytes.
However, the addressing modes for internal RAM can in
fact accommodate 384 bytes, using a simple trick. Direct
addresses higher than 7FH access one memory space,
and indirect addresses higher than 7FH access a different
memory space. Thus Fig.31 shows the upper 128 and
SFR space occupying the same block of addresses,
80H through FFH, although they are physically separate
entities.
The lower 128 bytes of RAM are present in all 80C51
devices as mapped in Fig.32. The lowest 32 bytes are
grouped into 4 banks of 8 registers. Program instructions
call out these registers as R0 through R7. Two bits in the
Program Status Word (PSW) select which register bank is
in use.
Thisallowsmoreefficientuseofcodespace,sinceregister
instructions are shorter than instructions that use direct
addressing. The next 16 bytes above the register banks
formablockofbit-addressablememoryspace.The80C51
instruction set includes a wide selection of single-bit
instructions, and the 128 bits in this area can be directly
addressed by these instructions. The bit addresses in this
areaare00H through 7FH.Allofthebytesinthelower 128
can be accessed by either direct or indirect addressing.
The upper address space of 128 bytes is overlaid with the
128-byte SFR address space. When using indirect
addressing the internal data memory is accessed but
when using direct addressing the SFR memory space is
accessed. Figure 31 shows the overlay of internal Data
Memory and SFR memory space. SFRs include the Port
latches,timers,peripheralcontrols,etc.Sixteenaddresses
in SFR space are both byte-and bit-addressable. The
bit-addressable SFRs are those whose address ends
in 0H or 8H.
MBL261
Accessible
by Indirect
Addressing
only
upper
128
lower
128
Accessible
by Direct
and Indirect
Addressing
SFR
Memory
Space
Ports,
Status and
Control Bits,
Timers,
Registers,
Stack Pointer,
Accumulator,
etc.
FFH
7FH
0
80H
FFH
80H
Accessible
by Direct
Addressing
RAM data memory
In the 83CL882 only 128 bytes of RAM are implemented,
therefore the upper 128 bytes are mapped to the
lower memory block
Fig.31 Internal Data Memory.
MGT303
00
bank
select
bits in
PSW
07H
0
01
0FH
08H
10
17H
10H
11
1FH
18H
2FH
20H
7FH
bit-addressable space
(bit addresses 0 to 7FH)
4 banks of 8 registers
R0 to R7
reset value of
Stack Pointer
Fig.32 The lower 128 bytes of internal Data
Memory.