參數(shù)資料
型號： P83CL882
廠商： NXP Semiconductors N.V.
英文描述： 80C51 Ultra Low Power ULP telephony controller
中文描述： 80C51的超低功耗無鉛汽油電話控制器
文件頁數(shù)： 57/88頁
文件大?。?/td> 328K
代理商： P83CL882
2001 Jun 19
57
Philips Semiconductors
Product specification
80C51 Ultra Low Power (ULP) telephony controller
P83CL882
6.9.1.2
MSK Modem Status Register (MSTAT)
Table 72
MSK Modem Status Register (SFR address D2H)
Table 73
Description of MSTAT bits
6.9.1.3
MSK Modem Data Buffer (MBUF)
Table 74
MSK Modem Data Buffer (SFR address D1H)
Table 75
Description of MBUF bits
7
6
5
4
3
2
1
0
MRF
MRE
MRP
MRL
MTI
MRI
BIT
SYMBOL
DESCRIPTION
5
MRF
Modem Receiver Full flag.
MRF is set when MBUF holds a newly received byte. MRF
is reset if the receiver is disabled (MREN = 0) or by clearing MRI. This bit is read-only;
writing to it will have no effect.
Modem Receiver Error flag.
Indicates the reception of a non-Manchester bit. This bit is
set by hardware and is reset by disabling the receiver (MREN = 0) or by clearing MRI.
This bit is read-only; writing to it will have no effect.
Modem Receiver Preamble flag.
MRP is set by hardware when the modem recognizes
the programmed preamble pattern (AAAH) after locking the receiver clock (MRL = 1).
MRP is reset by hardware if the receiver is disabled (MREN = 0) or if non-Manchester
data is received (MRE = 1). This bit is read-only; writing to it will have no effect.
Modem Receiver Clock Locked flag.
This bit is set when the clock of the receiver is
locked, i.e. when the receiver has detected three consecutive Manchester bits but has
not found the preamble pattern yet. MRL is reset when the receiver detects a
non-Manchester bit or when the receiver is disabled. This bit is read-only; writing to it
will have no effect.
Modem Transmit Interrupt flag.
Indicates MBUF is empty and ready to accept a new
byte for transmission. MTI is reset by writing a logic 0 to it. Writing a logic 1 to MTI sets
the bit and allows a hardware interrupt to be generated by software.
Modem Receive Interrupt flag.
Indicates:
Modem Receiver Full (MRF = 1) or
Modem Receiver Error (MRE = 1) or
Modem Receiver Preamble (MRP = 1) or
Modem Receiver Clock Locked (MRL = 1).
This bit is reset by writing a logic 0 to MRI. A reset of MRI will also reset MRE. Writing a
logic 1 to MRI will have no effect.
4
MRE
3
MRP
2
MRL
1
MTI
0
MRI
7
6
5
4
3
2
1
0
D7
D6
D5
D4
D3
D2
D1
D0
BIT
SYMBOL
DESCRIPTION
7 to 0
D7 to D0
Writing to MBUF loads the data into the transmit buffer and starts a transmission at
MOUT if the transmitter is enabled (MTEN = 1). A new byte can be loaded after MTI is
set. If a new byte is loaded before MTI is set the previous byte will be lost. After data has
been received at MIN, indicated by MRI, the received byte can be read from MBUF.
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