參數(shù)資料
型號(hào)： P83CL882
廠商： NXP Semiconductors N.V.
英文描述： 80C51 Ultra Low Power ULP telephony controller
中文描述： 80C51的超低功耗無鉛汽油電話控制器
文件頁數(shù)： 27/88頁
文件大?。?/td> 328K
代理商： P83CL882
2001 Jun 19
27
Philips Semiconductors
Product specification
80C51 Ultra Low Power (ULP) telephony controller
P83CL882
6.3.10
I
NTERRUPT
R
EQUEST
F
LAG
R
EGISTER
1 (IRQ1)
Table 28
Interrupt Request Flag Register 1 (SFR address C0H)
Table 29
Description of IRQ1 bits
6.3.11
I
NTERRUPT POLARITY AND
S
ENSITIVITY REGISTERS
6.3.11.1
Interrupt Polarity Register 1 (IX1)
Writing either a logic 1 or logic 0 to any Interrupt Polarity Register bit sets the polarity of the corresponding external
interrupt. If the interrupt sensitivity bit (ISE1 register, Section 6.3.11.2) is set to ‘level’ sensitive then a logic 1 corresponds
to active HIGH level and logic 0 to active LOW level. If the ISE1 register is set to ‘edge’ sensitive then a logic 1
corresponds to a rising edge and a logic 0 to a falling edge. See also Table 34 and Fig.12.
Table 30
Interrupt Polarity Register 1 (SFR address E9H)
Table 31
Description of IX1 bits
7
6
5
4
3
2
1
0
IQ9
IQ8
IQ7
IQ6
IQ5
IQ4
IQ3
IQ2
BIT
SYMBOL
DESCRIPTION
7
6
5
4
3
2
1
0
IQ9
IQ8
IQ7
IQ6
IQ5
IQ4
IQ3
IQ2
external interrupt 9 request flag
external interrupt 8 request flag
external interrupt 7 request flag
external interrupt 6 request flag
external interrupt 5 request flag
external interrupt 4 request flag
external interrupt 3 request flag
external interrupt 2 request flag
7
6
5
4
3
2
1
0
IX9
IX8
IX7
IX6
IX5
IX4
IX3
IX2
BIT
SYMBOL
DESCRIPTION
7 to 0
IX9 to IX2
external interrupt 9 to 2 polarity level
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