參數(shù)資料
型號(hào)： P83CL882
廠商： NXP Semiconductors N.V.
英文描述： 80C51 Ultra Low Power ULP telephony controller
中文描述： 80C51的超低功耗無(wú)鉛汽油電話控制器
文件頁(yè)數(shù)： 61/88頁(yè)
文件大?。?/td> 328K
代理商： P83CL882
2001 Jun 19
61
Philips Semiconductors
Product specification
80C51 Ultra Low Power (ULP) telephony controller
P83CL882
6.9.6
W
AVEFORM GENERATION WITH
MOUT[2:0]
The 3 digital output pins MOUT0 to MOUT2, should be
used as an input to a 3-bit external DAC. The signals can
be connected via external resistors R0, R1 and R2 to
a summation point and then be filtered with an external
capacitor (C1). The 3-bit DAC is shown in Fig.29. Table 76
gives the relationship between the MOUT pins and VOUT.
Figure 30 shows the waveforms that are produced by the
waveform generator. The horizontal axis shows the
sample counter on which the waveform changes its value.
Each bit is built-up out of 2
×
124 samples.
The vertical axis shows the values of MOUT[2:0], forming
the inputs of the resistive DAC. The first half of the
waveform is determined by the previous and the current
bit,whereasthesecondhalfofthewaveformisdetermined
by the current and the next bit to be transmitted. The count
frequency of the sample counter depends on the
programmed baud rate.
If the transmitter is disabled with MTEN set to a logic 0,
MOUT[2:0] is ‘111’ to save power in the resistive DAC.
If the transmitter is enabled and no data is transmitted,
MOUT[2:0] has an idle value of ‘100’, which corresponds
to 0.57V
DD
.
Table 76
VOUT as a function of MOUT[2:0]
Note
1.
VOUT with resistor values (see Fig.29): R1 = 0.5R0;
R2 = 0.25R0
6.9.7
M
ANCHESTER CODING OF DATA
The bits of the data byte written in MBUF are Manchester
encoded as shown in Fig.30. A logic 1 is coded as
a LOW-to-HIGH transition in the middle of a bitcell,
a logic 0 is coded as a HIGH-to-LOW transition.The
Manchester encoded signal contains redundancy for early
error detection in received bits. A non-matching
HIGH-to-LOW or LOW-to-HIGH pair indicates an error
condition.The Manchester encoded signal has a polarity
change in each bitcell.
MOUT2
MOUT1
MOUT0
VOUT
(1)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0.14V
DD
0.29V
DD
0.43V
DD
0.57V
DD
0.71V
DD
0.86V
DD
V
DD
handbook, halfpage
MGK231
WAVEFORM
GENERATOR
MOUT0
MOUT1
MOUT2
R0
R1
R2
VOUT
C1 = 10 nF
Fig.29 3-bit DAC with MOUT[2:0].
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