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參數(shù)資料
| 型號： | MT90866AG2 |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 路由/交換 |
| 英文描述： | Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PBGA344 |
| 封裝： | 27 X 27 MM, LEAD FREE, PLASTIC, MS-034, BGA-344 |
| 文件頁數(shù)： | 22/86頁 |
| 文件大?。?/td> | 701K |
| 代理商： | MT90866AG2 |
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MT90866
Data Sheet
22
Zarlink Semiconductor Inc.
local input to the backplane output. When BTM2 - BTM0 are set to “010”, it is a per-channel variable delay from
backplane input to backplane output.
For the local interface, the variable delay mode can be programmed through the local connection memory low
bits, LTM2 - LTM0. When LTM2 - LTM0 is programmed to “000”, it is a per-channel variable delay from local
input to local output. When LTM2 - LTM0 is set to “010”, it is a per-channel variable delay from backplane input
to local output.
Figure 5 - Block Programming Data in the Connection Memories
9.2 Constant Delay Mode
In this mode, a multiple data memory buffer is used to maintain frame integrity in all switching configurations by
using three pages of Data Memory where a channel written in any of the buffers during frame N is always read out
during frame N+2.
For the backplane interface, when BTM2 - BTM0 is programmed to “001”, it is a per-channel constant delay mode
from local input to backplane output. When BTM2 - BTM0 is programmed to “011”, it is a per-channel constant
delay from backplane input to backplane output.
For the local interface, when LTM2 - LTM0 is programmed to “001”, it is a per-channel constant delay mode from
local input to local output. When LTM2 - LTM0 is set to “011”, it is a per-channel constant delay mode from
backplane input to local output.
10.0 Microprocessor Interface
The MT90866 provides a parallel microprocessor interface for non-multiplexed bus structures. This interface is
compatible with Motorola non-multiplexed bus structure. The required microprocessor signals are the 16-bit data
bus (D15-D0), 14-bit address bus (A13-A0) and 4 control lines (CS, DS, R/W and DTA). See Figure 44, "Motorola
Non-Multiplexed Bus Timing" on page 82 for the Motorola non-multiplexed bus timing.
The MT90866 microprocessor port provides access to the internal registers, the connection and data memories. All
locations provide read/write access except for the Local and Backplane Bit Error Rate registers (LBERR and
BBERR) and Data Memory which can only be read by the users.
10.1 DTA Data Transfer Acknowledgment Pin
The DTA pin of the microprocessor is driven LOW by internal logic to indicate that a data bus transfer is completed.
When the bus cycle ends, this pin switches to the high impedance state. An external pull-up of between 1 K
and
10 K
is required at this output.
7
6
5
4
3
2
1
0
8
9
10
11
12
13
0
14
15
BBPD1
0
0
0
0
0
0
0
0
0
0
BBPD0 0
0
Backplane Connection Memory (BCM)
7
6
5
4
3
2
1
0
8
9
10
11
12
13
0
14
15
0
0
0
0
0
0
0
0
0
0
0
LBPD1 LBPD0 0
Local Connection Memory Low (LCML)
7
6
5
4
3
2
1
0
8
9
10
11
12
13
0
14
15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Local Connection Memory High (LCMH)
0
LBPD2
BBPD2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90866AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:WAN Access Switch |
| MT90868AG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 32KX8K/8KX8K/1K X 1K 1.8V/3.3V 466BGA - Trays |
| MT90868AG2 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 32KX8K/8KX8K/1K X 1K 1.8V/3.3V 466BGA - Trays |
| MT90869 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Flexible 16K Digital Switch (F16kDX) |
| MT90869AG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 16KX16K/8KX8K 1.8V/3.3V 272BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F16KDX 272PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F16KDX 272PBGA |
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