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MPC850 Integrated Communications Microprocessor Users Manual
MOTOROLA
ILLUSTRATIONS
Figure
Number
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32-1
Title
Page
Number
Middle-Speed IrDA Data Format ...............................................................................29-3
One Complete Symbol................................................................................................29-3
High-Speed Packet Format.........................................................................................29-4
Preamble Field Symbol Format..................................................................................29-4
Start Flag Symbol Format...........................................................................................29-4
High-Speed IrDA Data Format...................................................................................29-5
Serial Infrared Interaction Pulse Waveform...............................................................29-5
Stop Flag Symbol Format...........................................................................................29-5
Infrared Mode Register (IRMODE)............................................................................29-6
Infrared Serial Interaction Control Register (IRSIP)..................................................29-7
SMC Block Diagram...................................................................................................30-2
SMC Mode Registers (SMCMRn)..............................................................................30-3
SMC Memory Structure..............................................................................................30-6
SMC Function Code Registers (RFCR/TFCR)...........................................................30-8
SMC UART Frame Format ......................................................................................30-11
SMC UART Receive BD (RxBD)............................................................................30-15
SMC UART Receiving using RxBDs.......................................................................30-17
SMC UART Transmit BD (TxBD)...........................................................................30-18
SMC UART Event Register (SMCE)/Mask Register (SMCM)...............................30-19
SMC UART Interrupts Example ..............................................................................30-20
Synchronization with SMSYNx ...............................................................................30-24
Synchronization with the TSA..................................................................................30-25
SMC Transparent Receive BD (RxBD)....................................................................30-27
SMC Transparent Transmit BD (TxBD)..................................................................30-29
SMC Transparent Event Register (SMCE)/Mask Register (SMCM).......................30-30
SMC GCI Monitor Channel RxBD...........................................................................30-34
SMC GCI Monitor Channel TxBD...........................................................................30-35
SMC C/I Channel RxBD ..........................................................................................30-36
SMC C/I Channel TxBD...........................................................................................30-36
SMC GCI Event Register (SMCE)/Mask Register (SMCM)...................................30-37
SPI Block Diagram.....................................................................................................31-1
Single-Master/Multi-Slave Configuration..................................................................31-4
Multimaster Configuration..........................................................................................31-6
SPI Mode Register (SPMODE)..................................................................................31-7
SPI Transfer Format with SPMODE[CP] = 0 ............................................................31-8
SPI Transfer Format with SPMODE[CP] = 1 ............................................................31-8
SPI Event/Mask Registers (SPIE/SPIM)..................................................................31-10
SPI Command Register (SPCOM)............................................................................31-10
Receive/Transmit Function Code Registers (RFCR/TFCR).....................................31-12
SPI Memory Structure..............................................................................................31-13
SPI Receive BD (RxBD) ..........................................................................................31-14
SPI Transmit BD (TxBD).........................................................................................31-16
USB Controller Block Diagram..................................................................................32-2