MOTOROLA
Illustrations
xliii
ILLUSTRATIONS
Figure
Number
Title
Page
Number
23-13
23-14
23-15
23-16
23-17
24-1
24-2
25-1
25-2
25-3
25-4
Detecting an HDLC Bus Collision ...........................................................................23-20
Nonsymmetrical Tx Clock Duty Cycle for Increased Performance.........................23-20
HDLC Bus Transmission Line Configuration..........................................................23-21
Delayed RTS Mode...................................................................................................23-21
HDLC Bus TDM Transmission Line Configuration................................................23-22
LocalTalk Frame Format............................................................................................24-1
Connecting the MPC850 to LocalTalk.......................................................................24-3
Asynchronous HDLC Frame Structure.......................................................................25-2
Receive Flowchart ......................................................................................................25-4
TXCTL_TBL/RXCTL_TBL......................................................................................25-6
Asynchronous HDLC Event Register (SCCE)/Asynchronous HDLC
Mask Register (SCCM)...............................................................................................25-9
SCC Status Register for Asynchronous HDLC Mode (SCCS) ................................25-10
Asynchronous HDLC Mode Register (PSMR).........................................................25-11
SCC Asynchronous HDLC RxBDs..........................................................................25-12
SCC Asynchronous HDLC TxBDs ..........................................................................25-13
Classes of BISYNC Frames........................................................................................26-1
Control Character Table and RCCM..........................................................................26-6
BISYNC SYNC (BSYNC).........................................................................................26-7
BISYNC DLE (BDLE)...............................................................................................26-8
Protocol-Specific Mode Register for BISYNC (PSMR)..........................................26-10
SCC BISYNC RxBD................................................................................................26-12
SCC BISYNC TxBD................................................................................................26-14
BISYNC Event Register (SCCE)/BISYNC Mask Register (SCCM).......................26-15
SCC Status Registers (SCCS)...................................................................................26-16
Ethernet Frame Structure............................................................................................27-1
Ethernet Block Diagram .............................................................................................27-2
Connecting the MPC850 to Ethernet..........................................................................27-5
Ethernet Address Recognition Flowchart.................................................................27-12
Ethernet Mode Register (PSMR)..............................................................................27-15
SCC Ethernet Receive RxBD...................................................................................27-17
Ethernet Receiving using RxBDs.............................................................................27-19
SCC Ethernet TxBD .................................................................................................27-20
SCC Ethernet Event Register (SCCE)/Mask Register (SCCM)...............................27-21
Ethernet Interrupt Events Example...........................................................................27-22
Sending Transparent Frames between MPC850.........................................................28-5
SCC Transparent Receive Buffer Descriptor (RxBD)................................................28-9
SCC Transparent Transmit Buffer Descriptor (TxBD) ............................................28-11
SCC Transparent Event Register (SCCE)/Mask Register (SCCM) .........................28-12
SCC Status Register in Transparent Mode (SCCS)..................................................28-13
Serial Infrared (SIR) Link...........................................................................................29-1
Low-Speed IrDA Data Format....................................................................................29-2
Middle Speed Packet Format......................................................................................29-2
25-5
25-6
25-7
25-8
26-1
26-2
26-3
26-4
26-5
26-6
26-8
26-9
27-1
27-2
27-3
27-4
27-5
27-6
27-7
27-8
27-9
27-10
28-1
28-2
28-3
28-4
28-5
29-1
29-2
29-3