MOTOROLA
Contents
xxix
CONTENTS
Paragraph
Number
Title
Page
Number
33.4.3
33.4.4
33.4.5
33.5
33.6
33.7
33.7.1
33.7.1.1
33.7.1.2
I
2
C Baud Rate Generator Register (I2BRG)..................................................33-7
I
2
C Event/Mask Registers (I2CER/I2CMR)..................................................33-8
I
2
C Command Register (I2COM)..................................................................33-8
I
2
C Parameter RAM...........................................................................................33-9
I
2
C Commands.................................................................................................33-11
I
2
C Buffer Descriptor (BD) Tables..................................................................33-11
I
2
C Buffer Descriptors (BDs) ......................................................................33-12
I
2
C Receive Buffer Descriptor (RxBD)...................................................33-13
I
2
C Transmit Buffer Descriptor (TxBD) .................................................33-13
Chapter 34
Parallel I/O Ports
34.1
34.2
34.2.1
34.2.1.1
34.2.1.2
34.2.1.3
34.2.1.4
34.2.2
34.2.3
34.3
34.3.1
34.3.1.1
34.3.1.2
34.3.1.3
34.3.1.4
34.4
34.4.1
34.4.1.1
34.4.1.2
34.4.1.3
34.4.1.4
34.4.1.5
34.5
34.5.1
34.5.1.1
34.5.1.2
34.5.1.3
Features..............................................................................................................34-2
Port A.................................................................................................................34-2
Port A Registers .............................................................................................34-3
Port A Open-Drain Register (PAODR) .....................................................34-3
Port A Data Register (PADAT).................................................................34-3
Port A Data Direction Register (PADIR) ..................................................34-4
Port A Pin Assignment Register (PAPAR)................................................34-5
Port A Configuration Examples.....................................................................34-5
Port A Functional Block Diagrams................................................................34-6
Port B .................................................................................................................34-7
The Port B Registers ......................................................................................34-8
Port B Open-Drain Register (PBODR)......................................................34-8
Port B Data Register (PBDAT)..................................................................34-9
Port B Data Direction Register (PBDIR).................................................34-10
Port B Pin Assignment Register (PBPAR)..............................................34-10
Port C ...............................................................................................................34-11
Port C Registers............................................................................................34-14
Port C Data Register (PCDAT)................................................................34-14
Port C Data Direction Register (PCDIR).................................................34-14
Port C Pin Assignment Register (PCPAR)..............................................34-15
Port C Special Options Register (PCSO).................................................34-15
Port C Interrupt Control Register (PCINT)..............................................34-16
Port D...............................................................................................................34-17
Port D Registers ...........................................................................................34-18
Port D Data Register................................................................................34-18
Port D Data Direction Register (PDDIR) ................................................34-18
Port D Pin Assignment Register (PDPAR)..............................................34-19