參數(shù)資料
型號: MNSC140CORE
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類: 數(shù)字信號處理
英文描述: Quad Core 16-Bit Digital Signal Processor
中文描述: 四核16位數(shù)字信號處理器
文件頁數(shù): 59/88頁
文件大?。?/td> 983K
代理商: MNSC140CORE
AC Timings
MSC8122 Technical Data, Rev. 13
Freescale Semiconductor
2-25
2.5.12 EE Signals
Figure 2-22
shows the signal behavior of the
EE
pins.
2.5.13 JTAG Signals
Figure 2-21.
GPIO Timing
Table 2-28.
EE Pin Timing
Number
Characteristics
Type
Min
65
EE0 (input)
Asynchronous
4 core clock periods
66
EE1 (output)
Synchronous to Core clock
1 core clock period
Notes:
1.
2.
The core clock is the SC140 core clock. The ratio between the core clock and CLKOUT is configured during power-on-reset.
Refer to
Table 1-4
on page 1-6 for details on EE pin functionality.
Figure 2-22.
EE Pin Timing
Table 2-29.
JTAG Timing
No.
Characteristics
All
frequencies
Unit
Min
Max
700
701
702
TCK frequency of operation (1/(T
C
×
4); maximum 25 MHz)
TCK cycle time
TCK clock pulse width measured at V
M
= 1.6 V
High
Low
TCK rise and fall times
0.0
40.0
25
MHz
ns
20.0
16.0
0.0
3.0
ns
ns
ns
703
REFCLK
GPIO
(Output)
GPIO
(Input)
Valid
603
High Impedance
604
605
602
601
EE1 out
EE0 in
65
66
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