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參數(shù)資料
| 型號： | MNSC140CORE |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Quad Core 16-Bit Digital Signal Processor |
| 中文描述： | 四核16位數(shù)字信號處理器 |
| 文件頁數(shù)： | 25/88頁 |
| 文件大?。?/td> | 983K |
| 代理商： | MNSC140CORE |
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Memory Controller Signals
MSC8122 Technical Data, Rev. 13
Freescale Semiconductor
1-15
PSDA10
PGPL0
Output
Output
System Bus SDRAM A10
From the bus SDRAM controller. The precharge command defines which bank is precharged. When the
row address is driven, it is a part of the row address. When column address is driven, it is a part of column
address.
System Bus UPM General-Purpose Line 0
One of six general-purpose output lines from the UPM. The values and timing of this pin are programmed
in the UPM.
PSDWE
PGPL1
Output
Output
System Bus SDRAM Write Enable
From the bus SDRAM controller. Should connect to SDRAM WE input.
System Bus UPM General-Purpose Line 1
One of six general-purpose output lines from the UPM. The values and timing of this pin are programmed
in the UPM.
POE
PSDRAS
PGPL2
Output
Output
Output
System Bus Output Enable
From the bus GPCM. Controls the output buffer of memory devices during read operations.
System Bus SDRAM RAS
From the bus SDRAM controller. Should connect to SDRAM RAS input.
System Bus UPM General-Purpose Line 2
One of six general-purpose output lines from the UPM. The values and timing of this pin are programmed
in the UPM.
PSDCAS
PGPL3
Output
Output
System Bus SDRAM CAS
From the bus SDRAM controller. Should connect to SDRAM CAS input.
System Bus UPM General-Purpose Line 3
One of six general-purpose output lines from the UPM. The values and timing of this pin are programmed
in the UPM.
PGTA
PUPMWAIT
PGPL4
PPBS
Input
Input
Output
Output
System GPCM TA
Terminates external transactions during GPCM operation. Requires an external pull-up resistor for proper
operation.
System Bus UPM Wait
An external device holds this pin low to force the UPM to wait until the device is ready to continue the
operation.
System Bus UPM General-Purpose Line 4
One of six general-purpose output lines from the UPM. The values and timing of this pin are programmed
in the UPM.
System Bus Parity Byte Select
In systems that store data parity in a separate chip, this output is used as the byte-select for that chip.
PSDAMUX
PGPL5
Output
Output
System Bus SDRAM Address Multiplexer
Controls the system bus SDRAM address multiplexer when the MSC8122 is in external master mode.
System Bus UPM General-Purpose Line 5
One of six general-purpose output lines from the UPM. The values and timing of this pin are programmed
in the UPM.
Table 1-6.
Memory Controller Signals (Continued)
Signal Name
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MO1101A | 1.02 SINGLE DIGIT NUMERIC DISPLAY |
| MO1101C | 1.02 SINGLE DIGIT NUMERIC DISPLAY |
| MO1145C | Peripheral IC |
| MO1146C | Peripheral IC |
| XO1146C | Peripheral IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MNSC140CORE/D | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Network Digital Signal Processor |
| MNSCAN18541T-X | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:SERIALLY CONTROLLED ACCESS NETWORK NON-INVERTING LINE DRIVER WITH TRI-STATE OUTPUTS |
| M-NSD10 | 制造商:COOPER 制造商全稱:Cooper Bussmann, Inc. 功能描述:6 Reasons To Order Our Exciting New Cooper Bussmann Packaging |
| M-NSD16 | 制造商:COOPER 制造商全稱:Cooper Bussmann, Inc. 功能描述:6 Reasons To Order Our Exciting New Cooper Bussmann Packaging |
| M-NSD20 | 制造商:COOPER 制造商全稱:Cooper Bussmann, Inc. 功能描述:6 Reasons To Order Our Exciting New Cooper Bussmann Packaging |
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