參數(shù)資料
型號(hào): MNSC140CORE
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類: 數(shù)字信號(hào)處理
英文描述: Quad Core 16-Bit Digital Signal Processor
中文描述: 四核16位數(shù)字信號(hào)處理器
文件頁(yè)數(shù): 17/88頁(yè)
文件大?。?/td> 983K
代理商: MNSC140CORE
Direct Slave Interface, System Bus, Ethernet, and Interrupt Signals
MSC8122 Technical Data, Rev. 13
Freescale Semiconductor
1-7
HD55
D55
ETHTX_ER
Reserved
Input/ Output
Input/ Output
Output
Input
Host Data Bus 55
Bit 55 of the DSI data bus.
System Bus Data 55
For write transactions, the bus master drives valid data on this line. For read transactions, the slave drives
valid data on this bus.
Ethernet Transmit Data Error
In MII mode only, indicates a transmit data error.
In RMII mode, this pin is reserved and can be left unconnected.
HD56
D56
ETHRX_DV
ETHCRS_DV
Input/ Output
Input/ Output
Input
Input
Host Data Bus 56
Bit 56 of the DSI data bus.
System Bus Data 56
For write transactions, the bus master drives valid data on this line. For read transactions, the slave drives
valid data on this bus.
Ethernet Receive Data Valid
Indicates that the receive data is valid.
Ethernet Carrier Sense/Receive Data Valid
In RMII mode, indicates that a carrier is detected and after the connection is established that the receive
data is valid.
HD57
D57
ETHRX_ER
Input/ Output
Input/ Output
Input
Host Data Bus 57
Bit 57 of the DSI data bus.
System Bus Data 57
For write transactions, the bus master drives valid data on this line. For read transactions, the slave drives
valid data on this bus.
Ethernet Receive Data Error
In MII and RMII modes, indicates a receive data error.
HD58
D58
ETHMDC
Input/ Output
Input/ Output
Output
Host Data Bus 58
Bit 58 of the DSI data bus.
System Bus Data 58
For write transactions, the bus master drives valid data on this line. For read transactions, the slave drives
valid data on this bus.
Ethernet Management Clock
In MII and RMII modes, used for the MDIO reference clock.
HD59
D59
ETHMDIO
Input/ Output
Input/ Output
Input/ Output
Host Data Bus 59
Bit 59 of the DSI data bus.
System Bus Data 59
For write transactions, the bus master drives valid data on this line. For read transactions, the slave drives
valid data on this bus.
Ethernet Management Data
In MII and RMII modes, used for station management data input/output.
Table 1-5.
DSI, System Bus, Ethernet, and Interrupt Signals (Continued)
Signal Name
Type
Description
相關(guān)PDF資料
PDF描述
MO1101A 1.02 SINGLE DIGIT NUMERIC DISPLAY
MO1101C 1.02 SINGLE DIGIT NUMERIC DISPLAY
MO1145C Peripheral IC
MO1146C Peripheral IC
XO1146C Peripheral IC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MNSC140CORE/D 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Network Digital Signal Processor
MNSCAN18541T-X 制造商:NSC 制造商全稱:National Semiconductor 功能描述:SERIALLY CONTROLLED ACCESS NETWORK NON-INVERTING LINE DRIVER WITH TRI-STATE OUTPUTS
M-NSD10 制造商:COOPER 制造商全稱:Cooper Bussmann, Inc. 功能描述:6 Reasons To Order Our Exciting New Cooper Bussmann Packaging
M-NSD16 制造商:COOPER 制造商全稱:Cooper Bussmann, Inc. 功能描述:6 Reasons To Order Our Exciting New Cooper Bussmann Packaging
M-NSD20 制造商:COOPER 制造商全稱:Cooper Bussmann, Inc. 功能描述:6 Reasons To Order Our Exciting New Cooper Bussmann Packaging