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參數(shù)資料
| 型號(hào)： | LQ80221 |
| 英文描述： | LAN Transceiver |
| 中文描述： | 網(wǎng)絡(luò)收發(fā)器 |
| 文件頁數(shù)： | 6/91頁 |
| 文件大?。?/td> | 907K |
| 代理商： | LQ80221 |
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80220/80221
MD400159/E
6
Programmable LED Output/Management Interface Address Input.
The default func-
tion of this pin is to be a 100 Mbps Link Detect output. This pin can also be programmed
through the MI serial port to indicate other events or be user controlled. This pin can drive
an LED from VCC.
When programmed as 100 Mbps Link Detect Output (default):
1= No Detect
0 = 100 Mbps Link Detected
During powerup or reset, this pin is high impedance and the value on this pin is latched in
as the physical device address MDA3 for the MI serial port.
Programmable LED Output/Management Interface Address Input.
The default func-
tion of this pin is to be an Activity Detect output. This pin can also be programmed through
the MI serial port to indicte other events or be user controlled. This pin can drive an LED
from VCC.
When programmed as an Activity Detect Output (default):
1 = No Activity
0 = Transmit Or Receive Packet Occurred, Hold Low for 100 mS
During powerup or reset, this pin is high impedance and the value on this pin is latched in
as the physical device address MDA2 for the MI serial port.
Programmable LED Output/Management Interface Address Input.
The default func-
tion of this pin is to be a Full Duplex Detect output. This pin can also be programmed
through the MI serial port to indicate other events or be user controlled. This pin can drive
an LED from both VCC and GND.
When programmed as Full Duplex Detect Output (default).
1 = Half Duplex
0 = Full Duplex
During powerup or reset, this pin is high impedance and the value on this pin is latched in
as the physical address device address MDA1 for the MI serial port.
18
18
RX_ER /
RXD4
O
Receive Error Output.
This controller interface output is asserted active high when a
coding or other specified errors are detected on the receive twisted pair inputs and it is
clocked out on falling edges of RX_CLK.
If the device is placed in the Bypass 4B5B Decoder mode, this pin is reconfigured to be the
fifth RXD receive data output, RXD4.
Collision Output.
This controller interface output is asserted active high when a collision
between transmit and receive data is detected.
Management Interface (MI) Clock Input.
This MI clock shifts serial data into and out of
MDIO on rising edges.
Management Interface (MI) Data Input/Output.
This bidirectional pin contains serial MI
data that is clocked in and out on rising edges of the MDC clock.
Management Interface Interrupt Output/Management Interface Address Input.
This
pin is an interrupt output and is asserted active low whenever there is a change in certain
MI serial port register bits, and deasserted after all changed bits have been read
out.
During powerup or reset, this pin is high impedance and the value on this pin is latched
in as the physical device address MDA4 for the MI serial port
15
12
COL
O
13
10
MDC
I
14
11
MDIO
I/O
12
9
MDINT
(MDA4)
I/O
O.D.
Pullup
8
4
PLED3
(MDA3)
I/O
O.D.
Pullup
7
3
PLED2
(MDA2)
I/O
O.D.
Pullup
6
62
PLED1
(MDA1)
I/O
Pullup
Pin Description continued
Pin#
44L 64L
Pin
Name
I/O
Description
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