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參數資料
| 型號： | LQ80221 |
| 英文描述： | LAN Transceiver |
| 中文描述： | 網絡收發(fā)器 |
| 文件頁數： | 15/91頁 |
| 文件大?。?/td> | 907K |
| 代理商： | LQ80221 |
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80220/80221
4-15
MD400159/E
3.4.3 Encoder Bypass
The 4B5B encoder can be bypassed by setting the bypass
encoder/decoder bit in the MI serial port Configuration 1
register. When this bit is set to bypass the encoder/
decoder, 5B code words are passed directly from the
controller interface to the scrambler without any of the
alterations described n he 4B5B Encoder section. Setting
this bit automatically places the device in the FBI mode as
described in the Controller Interface section.
3.4 DECODER
3.4.1 4B5B Decoder - 100 Mbps
Since the TP input data is 4B5B encoded on the transmit
side, it must also be decoded by the 4B5B decoder on the
receive side. The mapping of the 5B nibbles to the 4B
code words is specified in IEEE 802.3 and shown in Table
2. The 4B45 decoder on the 80220/80221 takes the 5B
code words from the descrambler, converts them into 4B
nibbles per Table 2, and sends the 4B nibbles to the
controller interface. The 4B5B decoder also strips off the
SSD delimiter (a.k.a. /J/K/ symbols) and replaces them
with two 4B Data 5 nibbles (a.k.a /5/ symbol), and strips off
the ESD delimiter (a.k.a /T/R/ symbols) and replaces it
with two 4B Data 0 nibbles (a.k.a /I/ symbol), per IEEE
802.3 specifications and shown in Figure 2.
The 4B5B decoder detects SSD, ESD and, codeword
errors in the incoming data stream as specified in IEEE
802.3. These errors are indicated by asserting RX_ER
output while the errors are being transmitted across
RXD[3:0], and they are also indicated in the serial port by
setting SSD, ESD, and codeword error bits n the MI serial
port Status Output register.
3.4.2 Manchester Decoder - 10 Mbps
In Manchester coded data, the first half of the data bit
contains the complement of the data, and the second half
of the data bit contains the true data. The Manchester
decoder in the 80220/80221 converts the Manchester
encoded data stream from the TP receiver into NRZ data
for the controller interface by decoding the data and
stripping off the SOI pulse. Since the clock and data
recovery block has already separated the clock and data
from the TP receiver, the Manchester decoding process to
NRZ data is inherently performed by that block.
3.4.3 Decoder Bypass
The 4B5B decoder can be bypassed by setting the bypass
encoder/decoder bit in the MI serial port Configuration 1
register. When this bit is set to bypass the encoder/
decoder, (1) 5B code words are passed directly to the
controller interface from the descrambler without any of
the alterations described in the 4B5B Decoder section,
and (2) CRS s continuously asserted whenever he device
is in the Link Pass state. Setting this bit automatically
places the device in the FBI mode as described in the
Controller Interface section.
3.5 CLOCK AND DATA RECOVERY
3.5.1 Clock Recovery - 100 Mbps
Clock recovery is done with a PLL. If there is no valid data
present on the TP inputs, the PLL is locked to the 25 MHz
TX_CLK. When valid data is detected on the TP inputs
with the squelch circuit and when the adaptive equalizer
has settled, the PLL nput s switched to the ncoming data
on the TP input. The PLL then recovers a clock by locking
onto the transitions of the ncoming signal from the twisted
pair wire. The recovered clock frequency is a 25 MHz
nibble clock, and that clock is outputted on the controller
interface signal RX_CLK.
3.5.2 Data Recovery - 100 Mbps
Data recovery s performed by atching n data from the TP
receiver with the recovered clock extracted by the PLL.
The data is then converted from a single bit stream into
nibble wide data word according to the format shown in
Figure 3.
3.5.3 Clock Recovery - 10 Mbps
The clock recovery process for 10 Mbps mode is identical
to the 100 Mbps mode except, (1) the recovered clock
frequency s 2.5 MHz nibble clock, (2) the PLL s switched
from TX_CLK to the TP input when the squelch indicates
valid data, (3) The PLL takes up o 12 ransitions (bit imes)
to lock onto the preamble, so some of the preamble data
symbols are lost, but the clock recovery block recovers
enough preamble symbols to pass at least 6 nibbles of
preamble to the receive controller interface as shown in
Figure 3.
3.5.4 Data Recovery - 10 Mbps
The data recovery process for 10 Mbps mode is identical
to the 100 Mbps mode. As mentioned in the Manchester
Decoder section, the data recovery process inherently
performs decoding of Manchester encoded data from the
TP inputs.
3.6 SCRAMBLER
3.6.1 100 Mbps
100Base-TX requires scrambling to reduce the radiated
emissions on the twisted pair. The 80220/80221 scram-
bler takes the encoded data from the 4B5B encoder,
scrambles it per the IEEE 802.3 specifications, and sends
it to the TP transmitter.
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