參數(shù)資料
型號: ISP1582BS
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC56
封裝: 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56
文件頁數(shù): 66/66頁
文件大小: 325K
代理商: ISP1582BS
Koninklijke Philips Electronics N.V. 2004.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 25 August 2004
Document order number: 9397 750 13699
Contents
Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
1
2
3
4
5
6
7
7.1
7.2
8
8.1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering information. . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information. . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
Functional description . . . . . . . . . . . . . . . . . . 10
DMA interface, DMA handler and DMA
registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Hi-Speed USB transceiver . . . . . . . . . . . . . . . 11
MMU and integrated RAM . . . . . . . . . . . . . . . 11
Microcontroller interface and
microcontroller handler . . . . . . . . . . . . . . . . . 11
OTG SRP module. . . . . . . . . . . . . . . . . . . . . . 11
Philips high-speed transceiver . . . . . . . . . . . . 11
Philips Parallel Interface Engine (PIE) . . . . . . 11
Peripheral circuit. . . . . . . . . . . . . . . . . . . . . . . 11
HS detection. . . . . . . . . . . . . . . . . . . . . . . . . . 12
Philips Serial Interface Engine (SIE). . . . . . . . 12
SoftConnect . . . . . . . . . . . . . . . . . . . . . . . . . . 12
System controller . . . . . . . . . . . . . . . . . . . . . . 12
Output pins status. . . . . . . . . . . . . . . . . . . . . . 12
Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Interrupt output pin . . . . . . . . . . . . . . . . . . . . . 13
Interrupt control . . . . . . . . . . . . . . . . . . . . . . . 15
V
BUS
sensing . . . . . . . . . . . . . . . . . . . . . . . . . 15
Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 16
Power supply . . . . . . . . . . . . . . . . . . . . . . . . . 17
Power-sharing mode. . . . . . . . . . . . . . . . . . . . 18
Self-powered mode. . . . . . . . . . . . . . . . . . . . . 20
Bus-powered mode. . . . . . . . . . . . . . . . . . . . . 21
Register description . . . . . . . . . . . . . . . . . . . . 23
Register access . . . . . . . . . . . . . . . . . . . . . . . 24
Initialization registers . . . . . . . . . . . . . . . . . . . 24
Address register (address: 00h) . . . . . . . . . . . 24
Mode register (address: 0Ch). . . . . . . . . . . . . 25
Interrupt Configuration register (address: 10h) 27
OTG register (address: 12h). . . . . . . . . . . . . . 28
Interrupt Enable register (address: 14h). . . . . 30
Data flow registers . . . . . . . . . . . . . . . . . . . . . 31
Endpoint Index register (address: 2Ch) . . . . . 31
Control Function register (address: 28h) . . . . 33
Data Port register (address: 20h) . . . . . . . . . . 33
Buffer Length register (address: 1Ch) . . . . . . 34
Buffer Status register (address: 1Eh) . . . . . . . 35
8.2
8.3
8.4
8.5
8.6
8.6.1
8.6.2
8.6.3
8.7
8.8
8.9
8.10
8.11
8.11.1
8.11.2
8.12
8.13
8.14
8.14.1
8.14.2
8.14.3
9
9.1
9.2
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.3
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
9.3.6
Endpoint MaxPacketSize register (address:
04h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Endpoint Type register (address: 08h) . . . . . . 37
DMA registers . . . . . . . . . . . . . . . . . . . . . . . . 38
DMA Command register (address: 30h) . . . . 39
DMA Transfer Counter register (address: 34h) 40
DMA Configuration register (address: 38h) . . 41
DMA Hardware register (address: 3Ch). . . . . 42
DMA Interrupt Reason register (address: 50h) 43
DMA Interrupt Enable register (address: 54h) 45
DMA Endpoint register (address: 58h). . . . . . 45
DMA Burst Counter register (address: 64h). . 46
General registers . . . . . . . . . . . . . . . . . . . . . . 46
Interrupt register (address: 18h). . . . . . . . . . . 46
Chip ID register (address: 70h) . . . . . . . . . . . 48
Frame Number register (address: 74h) . . . . . 49
Scratch register (address: 78h) . . . . . . . . . . . 49
Unlock Device register (address: 7Ch). . . . . . 50
Test Mode register (address: 84h) . . . . . . . . . 51
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 52
Recommended operating conditions . . . . . . 52
Static characteristics . . . . . . . . . . . . . . . . . . . 53
Dynamic characteristics. . . . . . . . . . . . . . . . . 54
Register access timing. . . . . . . . . . . . . . . . . . 57
DMA timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Application information . . . . . . . . . . . . . . . . . 60
Test information. . . . . . . . . . . . . . . . . . . . . . . . 60
Package outline. . . . . . . . . . . . . . . . . . . . . . . . 61
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Introduction to soldering surface mount
packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 62
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 62
Manual soldering . . . . . . . . . . . . . . . . . . . . . . 63
Package related soldering information. . . . . . 63
Revision history . . . . . . . . . . . . . . . . . . . . . . . 64
Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 65
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
9.3.7
9.4
9.4.1
9.4.2
9.4.3
9.4.4
9.4.5
9.4.6
9.4.7
9.4.8
9.5
9.5.1
9.5.2
9.5.3
9.5.4
9.5.5
9.5.6
10
11
12
13
13.1
13.2
14
15
16
17
17.1
17.2
17.3
17.4
17.5
18
19
20
21
22
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