參數(shù)資料
型號: ISP1582BS
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC56
封裝: 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56
文件頁數(shù): 11/66頁
文件大?。?/td> 325K
代理商: ISP1582BS
Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Preliminary data
Rev. 03 — 25 August 2004
11 of 66
9397 750 13699
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.2 Hi-Speed USB transceiver
The analog transceiver directly interfaces to the USB cable through integrated
termination resistors. The high-speed transceiver requires an external resistor
(12.0 k
±
1 %) between pin RREF and ground to ensure an accurate current mirror
that generates the Hi-Speed USB current drive. A full-speed transceiver is integrated
as well. This makes the ISP1582 compliant to Hi-Speed USB and Original USB,
supporting both the high-speed and full-speed physical layers. After automatic speed
detection, the Philips Serial Interface Engine (SIE) sets the transceiver to use either
high-speed or full-speed signaling.
8.3 MMU and integrated RAM
The Memory Management Unit (MMU) and the integrated RAM provide the
conversion between the USB speed (full-speed: 12 Mbit/s, high-speed: 480 Mbit/s)
and the microcontroller handler or the DMA handler. The data from the USB bus is
stored in the integrated RAM, which is cleared only when the microcontroller has read
or written all data from or to the corresponding endpoint buffer or when the DMA
handler has read or written all data from or to the endpoint buffer. The OUT endpoint
buffer can also be cleared forcibly by setting bit CLBUF in the Control Function
register. A total of 8 kbytes RAM is available for buffering.
8.4 Microcontroller interface and microcontroller handler
The microcontroller handler allows the external microcontroller or microprocessor to
access the register set in the Philips SIE as well as the DMA handler. The
initialization of the DMA configuration is done through the microcontroller handler.
8.5 OTG SRP module
The OTG supplement defines a Session Request Protocol (SRP), which allows a
B-device to request the A-device to turn on V
BUS
and start a session. This protocol
allows the A-device, which may be battery-powered, to conserve power by turning off
V
BUS
when there is no bus activity while still providing a means for the B-device to
initiate bus activity.
Any A-device, including a PC or laptop, can respond to SRP. Any B-device, including
a standard USB peripheral, can initiate SRP.
The ISP1582 is a device that can initiate SRP.
8.6 Philips high-speed transceiver
8.6.1
Philips Parallel Interface Engine (PIE)
In the high-speed (HS) transceiver, the Philips PIE interface uses a 16-bit parallel
bidirectional data interface. The functions of the HS module also include bit-stuffing or
destuffing and Non-Return-to-Zero Inverted (NRZI) encoding or decoding logic.
8.6.2
Peripheral circuit
To maintain a constant current driver for HS transmit circuits and to bias other analog
circuits, an internal band gap reference circuit and an RREF resistor form the
reference current. This circuit requires an external precision resistor (12.0 k
±
1 %)
connected to the analog ground.
相關(guān)PDF資料
PDF描述
ISP1583 Hi-Speed Universal Serial Bus peripheral controller
ISP1583BS Hi-Speed Universal Serial Bus peripheral controller
ISP1760BE Hi-Speed Universal Serial Bus host controller for embedded applications
ISP1760 Hi-Speed Universal Serial Bus host controller for embedded applications
ISP1761 Hi-Speed Universal Serial Bus On-The-Go controller
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