參數(shù)資料
型號: ISP1582BS
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC56
封裝: 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56
文件頁數(shù): 49/66頁
文件大小: 325K
代理商: ISP1582BS
Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Preliminary data
Rev. 03 — 25 August 2004
49 of 66
9397 750 13699
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.5.3
Frame Number register (address: 74h)
This read-only register contains the frame number of the last successfully received
Start-Of-Frame (SOF). The register contains 2 bytes, and the bit allocation is given in
Table 69
. In case of 8-bit access, the register content is returned lower byte first.
9.5.4
Scratch register (address: 78h)
This 16-bit register can be used by the firmware to save and restore information. For
example, the device status before it enters the suspend state. The bit allocation is
given in
Table 71
.
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
15
14
13
12
11
10
9
8
CHIPID[7:0]
1
1
R
7
0
0
R
6
0
0
R
5
0
0
R
4
VERSION[7:0]
1
1
R
0
0
R
3
0
0
R
2
1
1
R
1
0
0
R
0
0
0
R
0
0
R
1
1
R
0
0
R
0
0
R
0
0
R
0
0
R
Table 68:
Bit
23 to 16
15 to 8
7 to 0
Chip ID register: bit description
Symbol
CHIPID[15:8]
CHIPID[7:0]
VERSION[7:0] version number (30h)
Description
chip ID: lower byte (15h)
chip ID: upper byte (82h)
Table 69:
Bit
Symbol
Power Reset
Bus Reset
Access
Bit
Symbol
Power Reset
Bus Reset
Access
Frame Number register: bit allocation
15
reserved
-
-
R
7
14
13
12
11
10
9
8
MICROSOF[2:0]
0
0
R
4
SOFR[10:8]
0
0
R
1
-
-
0
0
R
5
0
0
R
3
0
0
R
2
0
0
R
0
R
6
SOFR[7:0]
0
0
R
0
0
R
0
0
R
0
0
R
0
0
R
0
0
R
0
0
R
0
0
R
Table 70:
Bit
15 to 14
13 to 11
10 to 0
Frame Number register: bit description
Symbol
-
MICROSOF[2:0]
SOFR[10:0]
Description
reserved
microframe number
frame number
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