參數(shù)資料
型號: ISP1582BS
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC56
封裝: 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56
文件頁數(shù): 55/66頁
文件大?。?/td> 325K
代理商: ISP1582BS
Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Preliminary data
Rev. 03 — 25 August 2004
55 of 66
9397 750 13699
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
[1]
[2]
Excluding the first transition from the idle state.
Characterized only, not tested. Limits guaranteed by design.
Table 84:
V
CC
= 3.3 V
±
0.3 V; V
GND
= 0 V; T
amb
=
40
°
C to +85
°
C; C
L
= 50 pF; R
PU
= 1.5 k
on DP to V
TERM
; test circuit of
Figure 25
; unless otherwise specified.
Symbol Parameter
Conditions
Driver characteristics
Full-speed mode
t
FR
rise time
C
L
= 50 pF;
10 % to 90 % of
|
V
OH
V
OL
|
t
FF
fall time
C
L
= 50 pF;
90 % to 10 % of
|
V
OH
V
OL
|
FRFM
differential rise time and fall time
matching (t
FR
/t
FF
)
V
CRS
output signal crossover voltage
High-speed mode
t
HSR
high-speed differential rise time
with captive cable
t
HSF
high-speed differential fall time
with captive cable
Data source timing
Full-speed mode
t
FEOPT
source EOP width
see
Figure 16
t
FDEOP
source differential data-to-EOP
transition skew
Receiver timing
Full-speed mode
t
JR1
receiver data jitter tolerance to
next transition
t
JR2
receiver data jitter tolerance for
paired transitions
t
FEOPR
receiver SE0 width
accepted as EOP; see
Figure 16
t
FST
width of SE0 during differential
transition
Dynamic characteristics: analog I/O pins DP and DM
Min
Typ
Max
Unit
4
-
20
ns
4
-
20
ns
[1]
90
-
111.11 %
[1][2]
1.3
-
2.0
V
500
500
-
-
-
-
ps
ps
[2]
160
-
-
175
+5
ns
ns
see
Figure 16
[2]
2
see
Figure 17
[2]
18.5
-
+18.5
ns
see
Figure 17
[2]
9
-
+9
ns
[2]
82
-
-
-
14
ns
ns
rejected as EOP; see
Figure 18
[2]
-
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