參數(shù)資料
型號: ISP1581
廠商: NXP Semiconductors N.V.
英文描述: Universal Serial Bus 2.0 high-speed interface device
中文描述: 通用串行總線2.0高速接口設(shè)備
文件頁數(shù): 40/73頁
文件大?。?/td> 1819K
代理商: ISP1581
Philips Semiconductors
ISP1581
USB 2.0 HS interface device
Objective specification
Rev. 02 — 23 October 2000
40 of 73
9397 750 07648
Philips Electronics N.V. 2000. All rights reserved.
9.5.4
Scratch register (address: 78H)
This 16-bit register can be used by the firmware to save and restore information, e.g.
the device status before it enters power-off mode during ‘suspend’. The content of
this register will not be altered by a bus reset. The bit allocation is given in
Table 64
.
9.5.5
Unlock Device register (address: 7CH)
In ‘suspend’ state all the internal registers are write-protected to prevent data
corruption by external devices during a ‘resume’. Register access for reading is not
blocked.
To re-enable the ISP1581 registers from the write-protected mode, the firmware must
write a 2-byte unlock code (AA37H) into this register. The bit allocation of the Unlock
Device register is given in
Table 66
.
Table 63: Frame Number register: bit description
Bit
Symbol
13 to 11
MICROSOF[2:0]
10 to 0
SOFR[10:0]
Description
microframe number
frame number
Table 64: Scratch Register: bit allocation
Bit
15
Symbol
Reset
Bus reset
Access
Bit
7
Symbol
Reset
Bus reset
Access
14
13
12
11
10
9
8
SFIRH[7:0]
00H
unchanged
R/W
6
5
4
3
2
1
0
SFIRL[7:0]
00H
unchanged
R/W
Table 65: Scratch Information register: bit description
Bit
Symbol
15 to 8
SFIRH[7:0]
7 to 0
SFIRL[7:0]
Description
scratch firmware information register (high byte)
scratch firmware information register (low byte)
相關(guān)PDF資料
PDF描述
ISP1581BD Universal Serial Bus 2.0 high-speed interface device
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