參數(shù)資料
型號: ISP1581
廠商: NXP Semiconductors N.V.
英文描述: Universal Serial Bus 2.0 high-speed interface device
中文描述: 通用串行總線2.0高速接口設(shè)備
文件頁數(shù): 18/73頁
文件大?。?/td> 1819K
代理商: ISP1581
Philips Semiconductors
ISP1581
USB 2.0 HS interface device
Objective specification
Rev. 02 — 23 October 2000
18 of 73
9397 750 07648
Philips Electronics N.V. 2000. All rights reserved.
9.3 Data flow registers
9.3.1
Endpoint Index register (address: 2CH)
The Endpoint Index register selects a target endpoint for register access by the
microcontroller. The register consists of 1 byte and the bit allocation is shown in
Table 14
. The following registers are indexed:
Endpoint MaxPacketsize
Endpoint Type
Buffer Length
Data Port
Short Packet
Control Function.
For example, to access the OUT data buffer of endpoint 1 via the Data Port register,
the Endpoint Index register has to be written first with 02H.
Table 14: Endpoint Index register: bit allocation
Bit
7
Symbol
reserved
Reset
0
Bus reset
0
Access
R/W
6
5
4
3
2
1
0
reserved
0
0
R/W
EP0SETUP
0
0
R/W
ENDPIDX[3:0]
00H
00H
R/W
DIR
0
0
R/W
Table 15: Endpoint Index register: bit description
Bit
Symbol
7 to 6
-
5
EP0SETUP
Description
reserved
Selects the SETUP buffer for Endpoint 0:
0 —
EP0 data buffer
1 —
SETUP buffer.
Must be logic 0 for access to other endpoints than Endpoint 0.
ENDPIDX[3:0]
Endpoint Index:
Selects the target endpoint for register access
of Buffer Length, Control Function, Data Port, Endpoint Type,
MaxPacketSize and Short Packet.
DIR
Direction bit:
Sets the target endpoint as IN or OUT endpoint:
0 —
target endpoint refers to OUT (RX) FIFO
1 —
target endpoint refers to IN (TX) FIFO.
4 to 1
0
Table 16: Addressing of Endpoint 0 buffers
Buffer name
SETUP
Data OUT
Data IN
EP0SETUP
1
0
0
ENDPIDX
00H
00H
00H
DIR
0
0
1
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