參數(shù)資料
型號： ISP1581
廠商： NXP Semiconductors N.V.
英文描述： Universal Serial Bus 2.0 high-speed interface device
中文描述： 通用串行總線2.0高速接口設備
文件頁數(shù)： 27/73頁
文件大?。?/td> 1819K
代理商： ISP1581
Philips Semiconductors
ISP1581
USB 2.0 HS interface device
Objective specification
Rev. 02 — 23 October 2000
27 of 73
9397 750 07648
Philips Electronics N.V. 2000. All rights reserved.
9.4.2
DMA Transfer Counter register (address: 34H)
This 4-byte register is used to set up the total byte count of a DMA transfer (DMACR).
It indicates the remaining number of bytes left for transfer. The bit allocation is given
in
Table 33
.
The transfer counter is used in DMA modes: PIO (commands: 04H, 05H), UDMA
(commands: 02H, 03H), MDMA (commands: 06H, 07H) and GDMA (commands:
00H, 01H).
A new value is written into the register starting with the lower byte (DMACR1) or the
lower word (MSB: DMACR2, LSB: DMACR1). Internally, the transfer counter is
initialized only after the last byte (DMACR4) has been written.
In the GDMA Slave mode only, the transfer counter can be disabled via bit
DIS_XFER_CNT in the DMA Configuration Register (see
Table 35
). In this case,
input EOT can be used to terminate the DMA transfer when data is transferred from
the external device to the host via IN tokens. The last packet in the FIFO is validated
when pin EOT is asserted. When the host sends data to an external device via OUT
tokens, the EOT condition is ignored.
0C
Read Task Files
Read Task Files:
Reads all task file registers except
1F0H and 1F7H. When reading has been completed,
an interrupt is generated.
reserved
Validate Buffer (for debugging only):
Request from
the microcontroller to validate the endpoint buffer
following an ATA to USB data transfer.
Clear Buffer:
Request from the microcontroller to clear
the endpoint buffer after a USB to ATA data transfer.
Restart:
Request from the microcontroller to move the
buffer pointers to the beginning of the endpoint FIFO.
Reset DMA:
Initializes the DMA core to its power-on
reset state.
reserved
0D
0E
-
Validate Buffer
0F
Clear Buffer
10
Restart
11
Reset DMA
12 to FF
-
Table 32: DMA commands
…continued
Code (Hex)
Name
Description
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