參數(shù)資料
型號(hào): HB52E169E12
廠商: Hitachi,Ltd.
英文描述: 128 MB Registered SDRAM DIMM(128 MB 寄存同步DRAM DIMM)
中文描述: 128 MB的注冊SDRAM的內(nèi)存(128 MB的寄存同步的DRAM內(nèi)存)
文件頁數(shù): 1/53頁
文件大?。?/td> 1737K
代理商: HB52E169E12
HB52E169E12-F
128 MB Registered SDRAM DIMM
16-Mword
×
72-bit, 100 MHz Memory Bus, 1-Bank
Module
(18 pcs of 16 M
×
4 Components)
PC100SDRAM
ADE-203-1055 (Z)
Preliminary
Rev. 0.0
Apr. 16, 1999
Description
The HB52E169E12 belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been developed
as an optimized main memory solution for 8-byte processor applications. The HB52E169E12 is a 16M
×
72
×
1-bank Synchronous Dynamic RAM Registered Module, mounted 18 pieces of 64-Mbit SDRAM
(HM5264405FTT) sealed in TSOP package, 1 piece of PLL clock driver (2509), 2 pieces of register driver
(16835) and 1 piece of serial EEPROM (2-kbit EEPROM) for Presence Detect (PD). An outline of the
HB52E169E12 is 168-pin socket type package (dual lead out). Therefore, the HB52E169E12 makes high
density mounting possible without surface mount technology. The HB52E169E12 provides common data in-
puts and outputs. Decoupling capacitors are mounted beside each TSOP on the module board.
Features
Fully compatible with: JEDEC standard outline registered 8-byte DIMM
— Intel PCB Reference design (Rev.1.2)
168-pin socket type package (dual lead out)
— Outline: 133.37 mm (Length)
×
43.18 mm (Height)
×
4.00 mm (Thickness)
— Lead pitch: 1.27 mm
3.3 V power supply
Clock frequency: 100 MHz (max)
LVTTL interface
Data bus width:
×
72 ECC
Single pulsed RAS
4 Banks can operates simultaneously and independently
Burst read/write operation and burst read/single write operation capability
Programmable burst length: 1/2/4/8/full page
2 variations of burst sequence
— Sequential (BL = 1/2/4/8/full page)
— Interleave (BL = 1/2/4/8)
Programmable CE latency: 3/4 (HB52E169E12-A6F)
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